Abstract: A method for reproducible parallel discrete-event simulation at electronic system level implemented by means of a multi-core computer system, the simulation method comprising a succession of evaluation phases, implemented by a simulation kernel executed by the computer system, comprising the following steps: parallel process scheduling; dynamic detection of shared addresses of at least one shared memory of an electronic system simulated by concurrent processes, at addresses of the shared memory, using a state machine, respectively associated with each address of the shared memory; avoidance of access conflicts at addresses of the shared memory by concurrent processes, by pre-emption of a process by the kernel when the process introduces an inter-process dependency of “read after write” or “write after read or write” type; verification of access conflicts at shared-memory addresses by analysis of the inter-process dependencies using a trace of the accesses to the shared-memory addresses of each evaluation phas

Abstract: An electronic system-level reproducible parallel discrete event simulation method implemented by way of a multicore computing system, the simulation method includes a succession of evaluation phases, implemented by a simulation kernel executed by the computing system, comprising the following steps: parallel scheduling of processes; dynamically detecting shared addresses; avoiding access conflicts to addresses of the shared memory; verifying access conflicts to shared memory addresses; rolling back, upon detecting at least one conflict; and generating an execution trace for the subsequent identical reproduction of the simulation.