Patents by Inventor Gabriel Cueva

Gabriel Cueva has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9136111
    Abstract: A field effect transistor and method for making such a transistor is provided, the field effect transistor comprising: a gate layer stack comprising a layer of a first metal is disposed proximate to at least one layer of a second metal, wherein the first metal alloys with the second metal to form a shape memory alloy. The shape metal allow may be NiTi, and at the contact plane between the layers, the alloy is formed when the transistor is heated to an elevated temperature.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: September 15, 2015
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Kanin Chu, Pane-Chane Chao, Kirby B. Nichols, Gabriel Cueva
  • Patent number: 7943286
    Abstract: A method for fabricating ultra-short T-gates on heterojunction field effect transistors (HFETs) comprising the steps of (a) providing a coating of three layers of resists, with polymethylmethacrylate (PMMA) with high molecular weight on the bottom, polydimethylglutarimide (PMGI) in the middle, and PMMA with low molecular weight on the top; (b) in a first exposure, exposing and developing the layers with a dose of a developer that is high enough to allow the developer to break the top PMMA but low to avoid contributing significantly to the overall dose received in the bottom PMMA layer; and (c) in a second exposure, using an exposure and developing process to define 0.03-0.05 um openings in the bottom PMMA layer.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: May 17, 2011
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Dong Xu, Gabriel Cueva, Pane-chane Chao, Wendell Kong
  • Publication number: 20080241757
    Abstract: A method for fabricating ultra-short T-gates on heterojunction field effect transistors (HFETs) comprising the steps of (a) providing a coating of three layers of resists, with polymethylmethacrylate (PMMA) with high molecular weight on the bottom, polydimethylglutarimide (PMGI) in the middle, and PMMA with low molecular weight on the top; (b) in a first exposure, exposing and developing the layers with a dose of a developer that is high enough to allow the developer to break the top PMMA but low to avoid contributing significantly to the overall dose received in the bottom PMMA layer; and (c) in a second exposure, using an exposure and developing process to define 0.03-0.05 um openings in the bottom PMMA layer.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 2, 2008
    Inventors: Dong Xu, Gabriel Cueva, Pane-chane Chao, Wendell Kong