Patents by Inventor Gabriel H. Soto

Gabriel H. Soto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7654186
    Abstract: A self-contained fuze module, for installation on pieces of ordnance, having sensing devices and processing capability within the fuze module to determine whether conditions have been met to arm the ordnance. The fuze module is a unitary sealed module communicating with a launch vehicle via one or more communication/power buses.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: February 2, 2010
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Randall D. Cope, Gabriel H. Soto, John K. Kandell, Brian D. Dutton
  • Patent number: 7591225
    Abstract: A self-contained fuze module, for installation on pieces of ordnance, having sensing devices and processing capability within the fuze module to determine whether conditions have been met to arm the ordnance. The fuze module is a unitary sealed module communicating with a launch vehicle via one or more communication/power buses.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: September 22, 2009
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Randall D. Cope, Gabriel H. Soto, John K. Kandell, Brian D. Dutton
  • Patent number: 7040234
    Abstract: The present invention relates to a device for electronically arming and firing a MEMS-scale interrupted explosive train to detonate a main charge explosive. The device includes a MEMS slider assembly housing a transfer charge electrically actuated to move between safe and armed positions of the explosive train.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: May 9, 2006
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Walter H. Maurer, Gabriel H. Soto, David R. Hollingsworth
  • Patent number: 7007606
    Abstract: The present invention relates to a method utilizing a MEMS safe arm device for electronically arming and firing a MEMS-scale interrupted explosive train to detonate a main charge explosive. The device includes a MEMS slider assembly housing a transfer charge electrically actuated to move between safe and armed positions of the explosive train.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: March 7, 2006
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Walter H. Maurer, Gabriel H. Soto, David R. Hollingsworth
  • Patent number: 6782298
    Abstract: Electronics for a shock-hardened device, in particular a data recorder, incorporating non-volatile memory. The device has the functional elements: a signal conditioning circuit, an oscillator, an analog-to-digital converter (ADC), a field programmable gate array (FPGA), a trigger, and a non-volatile memory incorporating both electrically erasable programmable read only memory (EEPROM) and fast static random access memory (SRAM). As a recorder, the electronics enable efficient and reliable data recording in extreme shock environments, e.g., those involving dynamic testing of weapons such as target penetrating bombs or dual-stage warheads. It also provides for data retention upon loss or shutdown of power to the unit and yields high MTBF (mean time between failure) figures in more benign environments.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: August 24, 2004
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Gabriel H. Soto, Michael D. Haddon
  • Publication number: 20030223317
    Abstract: Electronics for a shock-hardened device, in particular a data recorder, incorporating non-volatile memory. The device has the functional elements: a signal conditioning circuit, an oscillator, an analog-to-digital converter (ADC), a field programmable gate array (FPGA), a trigger, and a non-volatile memory incorporating both electrically erasable programmable read only memory (EEPROM) and fast static random access memory (SRAM). As a recorder, the electronics enable efficient and reliable data recording in extreme shock environments, e.g., those involving dynamic testing of weapons such as target penetrating bombs or dual-stage warheads. It also provides for data retention upon loss or shutdown of power to the unit and yields high MTBF (mean time between failure) figures in more benign environments.
    Type: Application
    Filed: March 17, 2003
    Publication date: December 4, 2003
    Inventors: Gabriel H. Soto, Michael D. Haddon
  • Patent number: 6560494
    Abstract: Electronics for a shock-hardened device, in particular a data recorder, incorporating non-volatile memory. The device has the functional elements: a signal conditioning circuit, an oscillator, an analog-to-digital converter (ADC), a field programmable gate array (FPGA), a trigger, and a non-volatile memory incorporating both electrically erasable programmable read only memory (EEPROM) and fast static random access memory (SRAM). As a recorder, the electronics enable efficient and reliable data recording in extreme shock environments, e.g., those involving dynamic testing of weapons such as target penetrating bombs or dual-stage warheads. It also provides for data retention upon loss or shutdown of power to the unit and yields high mean time between failures (MTBF) figures in more benign environments.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: May 6, 2003
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Gabriel H. Soto, Michael D. Haddon
  • Patent number: 6389975
    Abstract: Disclosed, in a preferred embodiment, is a switching circuit incorporating a Field Effect Transistor (FET), two series dual-tap gas tube surge arrestors, and high-voltage resistors as part of a high voltage switch of a fireset for initiating an exploding foil initiator (EFI). Until energizing the FET via a firing command, an operating voltage of 1000 V is held off by a combination of the surge arrestors and high-voltage resistors. Upon receipt of a firing signal, a 28 V source is used to energize the FET that, in turn, decreases the voltage across the one surge arrestor connected directly to ground and increases the voltage across the other surge arrestor. Upon reaching the breakdown voltage of the ionizable gas within the second surge arrestor, the gas ionizes, becomes electrically conductive, and dumps the second surge arrestor's voltage across the first surge arrestor. This causes the first surge arrestor to also break down. Both surge arrestors are now conducting.
    Type: Grant
    Filed: April 24, 2000
    Date of Patent: May 21, 2002
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Michael D. Haddon, Gabriel H. Soto