Patents by Inventor Gabriel L. Romero
Gabriel L. Romero has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9267991Abstract: A test pattern is encoded using a run length limited line encoding to produce an encoded block of data. The encoded block of data is sent via a channel. A plurality of bits in the received block of data that are subsequent to a maximum length run in the sent data is compared to an expected plurality of bits. A type of bit error is classified based on a mismatch between the expected plurality of bits and the plurality of bits in the received block of data.Type: GrantFiled: March 31, 2015Date of Patent: February 23, 2016Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Coralyn S. Gauvin, Gabriel L. Romero
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Publication number: 20150205653Abstract: A test pattern is encoded using a run length limited line encoding to produce an encoded block of data. The encoded block of data is sent via a channel. A plurality of bits in the received block of data that are subsequent to a maximum length run in the sent data is compared to an expected plurality of bits. A type of bit error is classified based on a mismatch between the expected plurality of bits and the plurality of bits in the received block of data.Type: ApplicationFiled: March 31, 2015Publication date: July 23, 2015Inventors: Coralyn S. Gauvin, Gabriel L. Romero
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Patent number: 9021325Abstract: A test pattern is encoded using a run length limited line encoding to produce an encoded block of data. The encoded block of data is sent via a channel. A plurality of bits in the received block of data that are subsequent to a maximum length run in the sent data is compared to an expected plurality of bits. A type of bit error is classified based on a mismatch between the expected plurality of bits and the plurality of bits in the received block of data.Type: GrantFiled: February 7, 2013Date of Patent: April 28, 2015Assignee: LSI CorporationInventors: Coralyn S. Gauvin, Gabriel L. Romero
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Patent number: 8854983Abstract: Decision modules are strategically located along with various modules to route signals from either a test pattern generator or the data link layer through the various modules for performing scrambling, encoding, and serializing procedures on the signals before transmission of the signals on a serial bus. Decision modules are strategically placed along with various modules to route signals to either a test pattern checker or the data link layer through the various modules for performing descrambling, decoding, and deserializing procedures on the signals after receiving the signals from a serial bus.Type: GrantFiled: December 3, 2010Date of Patent: October 7, 2014Assignee: LSI CorporationInventors: Gabriel L. Romero, Coralyn S. Gauvin
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Publication number: 20140223270Abstract: A test pattern is encoded using a run length limited line encoding to produce an encoded block of data. The encoded block of data is sent via a channel. A plurality of bits in the received block of data that are subsequent to a maximum length run in the sent data is compared to an expected plurality of bits. A type of bit error is classified based on a mismatch between the expected plurality of bits and the plurality of bits in the received block of data.Type: ApplicationFiled: February 7, 2013Publication date: August 7, 2014Applicant: LSI CORPORATIONInventors: Coralyn S. Gauvin, Gabriel L. Romero
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Patent number: 8687683Abstract: A method for determining floating tap positions in a DFE of a receiver is disclosed. The method include providing a group of floating taps for the DFE; obtaining a baseline eye opening value for the receiver when the group of floating taps is disabled; providing a plurality of floating tap distribution configurations, each specifying a distribution configuration for the group of floating taps within the DFE; obtaining a plurality of eye opening values for the receiver, each particular eye opening value corresponding to a particular floating tap distribution configuration when the group of floating taps are distributed within the DFE according to the particular floating tap distribution configuration; comparing each of the plurality of eye opening values against the baseline eye opening value; and identifying an optimal floating tap distribution configuration based on the comparison of each of the plurality of eye opening values against the baseline eye opening value.Type: GrantFiled: November 22, 2011Date of Patent: April 1, 2014Assignee: LSI CorporationInventors: John D. Gardner, Gabriel L. Romero
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Patent number: 8566496Abstract: A SAS expander collects data access information associated with a nexus and determines whether a data prefetch is appropriate. The SAS expander identifies potential data blocks utilizing previous data requests of the nexus. The SAS expander issues a data request to the target for the potential data blocks. The SAS expander stores the potential data blocks within a prefetch cache for future utilization within a data read.Type: GrantFiled: December 3, 2010Date of Patent: October 22, 2013Assignee: LSI CorporationInventors: Gabriel L. Romero, Frederick G. Smith
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Publication number: 20130128946Abstract: A method for determining floating tap positions in a DFE of a receiver is disclosed. The method include providing a group of floating taps for the DFE; obtaining a baseline eye opening value for the receiver when the group of floating taps is disabled; providing a plurality of floating tap distribution configurations, each specifying a distribution configuration for the group of floating taps within the DFE; obtaining a plurality of eye opening values for the receiver, each particular eye opening value corresponding to a particular floating tap distribution configuration when the group of floating taps are distributed within the DFE according to the particular floating tap distribution configuration; comparing each of the plurality of eye opening values against the baseline eye opening value; and identifying an optimal floating tap distribution configuration based on the comparison of each of the plurality of eye opening values against the baseline eye opening value.Type: ApplicationFiled: November 22, 2011Publication date: May 23, 2013Applicant: LSI CORPORATIONInventors: John D. Gardner, Gabriel L. Romero
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Patent number: 8261156Abstract: Methods and apparatuses for correcting an error in a data stream that is coded with a line code and an error detection scheme. Information relating to the line code is used to locate at least one possible error character. At least one possible correct character to replace one or more of the at least one possible error character is then identified. Subsequently, the error detection scheme is applied to the data stream updated with one of the at least one possible correct character. If none of the at least one possible correct character results in a valid data stream, an error that is observable by a user is generated.Type: GrantFiled: September 11, 2008Date of Patent: September 4, 2012Assignee: LSI CorporationInventors: Gabriel L. Romero, Frederick G. Smith
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Publication number: 20120140840Abstract: Decision modules are strategically located along with various modules to route signals from either a test pattern generator or the data link layer through the various modules for performing scrambling, encoding, and serializing procedures on the signals before transmission of the signals on a serial bus. Decision modules are strategically placed along with various modules to route signals to either a test pattern checker or the data link layer through the various modules for performing descrambling, decoding, and deserializing procedures on the signals after receiving the signals from a serial bus.Type: ApplicationFiled: December 3, 2010Publication date: June 7, 2012Applicant: LSI CORPORATIONInventors: Gabriel L. Romero, Coralyn S. Gauvin
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Publication number: 20120144082Abstract: A SAS expander collects data access information associated with a nexus and determines whether a data prefetch is appropriate. The SAS expander identifies potential data blocks utilizing previous data requests of the nexus. The SAS expander issues a data request to the target for the potential data blocks. The SAS expander stores the potential data blocks within a prefetch cache for future utilization within a data read.Type: ApplicationFiled: December 3, 2010Publication date: June 7, 2012Applicant: LSI CORPORATIONInventors: Gabriel L. Romero, Frederick G. Smith
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Publication number: 20120042207Abstract: Method and structures provide for testing a SAS link during speed negotiation windows to determine success/failure in using a negotiated speed at one or more configured sets of speed options. For each device linked to a master SAS device, each possible set of speed options is configured; the device participates in a speed negotiation window operation with the current speed options configured. One or more SCSI requests are forwarded from the master device to the attached device. The SCSI requests may be non-destructive of data stored on the attached device. Results of the tests may be used to select a preferred speed for communication between the master device and that attached device. The speed options to be varied and tested may include: link speed; spread spectrum clocking for each SAS speed; type of supported spread spectrum clocking; and logical link rate in support of multiplexing.Type: ApplicationFiled: March 26, 2007Publication date: February 16, 2012Inventors: David T. Uddenberg, Gabriel L. Romero
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Patent number: 8116147Abstract: Method and structures provide for testing a SAS link during speed negotiation windows to determine success/failure in using a negotiated speed at one or more configured sets of speed options. For each device linked to a master SAS device, each possible set of speed options is configured; the device participates in a speed negotiation window operation with the current speed options configured. One or more SCSI requests are forwarded from the master device to the attached device. The SCSI requests may be non-destructive of data stored on the attached device. Results of the tests may be used to select a preferred speed for communication between the master device and that attached device. The speed options to be varied and tested may include: link speed; spread spectrum clocking for each SAS speed; type of supported spread spectrum clocking; and logical link rate in support of multiplexing.Type: GrantFiled: March 26, 2007Date of Patent: February 14, 2012Assignee: LSI CorporationInventors: David T. Uddenberg, Gabriel L. Romero
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Publication number: 20110106997Abstract: Methods and apparatus for interconnecting Serial Attached SCSI (SAS) or Serial Advanced Technology Attachment (SATA) devices using either an electrical communication medium or an optical communication medium. Each device includes an out of band (OOB) encoder/decoder (endec) logic component to translate between standard OOB signals used by the devices and digitally encoded OOB signals exchanged over the communication medium. Thus the devices may be coupled using either optical or electrical cabling. The digitally encoded OOB signals may also be scrambled to reduce electromagnetic interference (EMI) generated during OOB communications using the digitally encoded OOB signals. The scrambled digitally encoded OOB signals may comprise information regarding capabilities of the device that generated the underlying OOB signal. Such information may indicate to the other high speed device certain capabilities of the transmitting device—the information to be used in establishing logical connections between devices.Type: ApplicationFiled: November 5, 2009Publication date: May 5, 2011Applicant: LSI CORPORATIONInventors: Gabriel L. Romero, Coralyn S. Gauvin
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Patent number: 7936829Abstract: Driving multiple consecutive bits having a same logic value in a serial data stream involves driving a first bit of the multiple consecutive bits in the serial data stream at an initial voltage level, and driving at least two additional bits of the multiple consecutive bits in the serial data stream at voltage levels stepped down from the initial voltage level.Type: GrantFiled: October 22, 2004Date of Patent: May 3, 2011Assignee: LSI CorporationInventors: Gabriel L. Romero, Frederick G. Smith, Brian E. Burdick
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Patent number: 7805554Abstract: Method and structures provide for testing a SAS link in association with participating in training windows to determine success/failure in using a negotiated speed using one or more configured sets of transceiver training options. For each device linked to a master SAS device, each possible set of transceiver training options is configured and one or more SCSI requests are forwarded from the master device to the attached device. The SCSI requests may be non-destructive of data stored on the attached device. Results of the tests may be used to select a preferred set of transceiver training options for communication between the master device and that attached device. The transceiver training options to be varied and tested may include: amplitude, slew rate, de-emphasis, and spread spectrum clocking.Type: GrantFiled: March 26, 2007Date of Patent: September 28, 2010Assignee: LSI CorporationInventors: David T. Uddenberg, Gabriel L. Romero
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Patent number: 7774669Abstract: The present invention provides systems, devices and methods for generating user-defined test patterns within serial controller to facilitate signal testing and verification. These user-defined test patterns may be generated to more accurately reflect the actual traffic of a device-under-test or system, as well as allow a test engineer to more accurately test the boundaries of the device or system. In various embodiments of the invention, a programmable patterns generator is provided for generating user-defined test patterns that may be used during a testing procedure. This programmable pattern generator allows a user to define a particular test pattern by providing bit-by-bit test values, by defining a combination of canned sequences, or by supplementing one or more canned sequences with additional test bits.Type: GrantFiled: June 11, 2007Date of Patent: August 10, 2010Assignee: LSI CorporationInventors: Gabriel L. Romero, Coralyn S. Gauvin
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Publication number: 20100064192Abstract: Methods and apparatuses for correcting an error in a data stream that is coded with a line code and an error detection scheme. Information relating to the line code is used to locate at least one possible error character. At least one possible correct character to replace one or more of the at least one possible error character is then identified. Subsequently, the error detection scheme is applied to the data stream updated with one of the at least one possible correct character. If none of the at least one possible correct character results in a valid data stream, an error that is observable by a user is generated.Type: ApplicationFiled: September 11, 2008Publication date: March 11, 2010Inventors: Gabriel L. Romero, Frederick G. Smith
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Publication number: 20080307283Abstract: The present invention provides systems, devices and methods for generating user-defined test patterns within serial controller to facilitate signal testing and verification. These user-defined test patterns may be generated to more accurately reflect the actual traffic of a device-under-test or system, as well as allow a test engineer to more accurately test the boundaries of the device or system. In various embodiments of the invention, a programmable patterns generator is provided for generating user-defined test patterns that may be used during a testing procedure. This programmable pattern generator allows a user to define a particular test pattern by providing bit-by-bit test values, by defining a combination of canned sequences, or by supplementing one or more canned sequences with additional test bits.Type: ApplicationFiled: June 11, 2007Publication date: December 11, 2008Inventors: Gabriel L. Romero, Coralyn S. Gauvin
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Publication number: 20080244100Abstract: Method and structures provide for testing a SAS link in association with participating in training windows to determine success/failure in using a negotiated speed using one or more configured sets of transceiver training options. For each device linked to a master SAS device, each possible set of transceiver training options is configured and one or more SCSI requests are forwarded from the master device to the attached device. The SCSI requests may be non-destructive of data stored on the attached device. Results of the tests may be used to select a preferred set of transceiver training options for communication between the master device and that attached device. The transceiver training options to be varied and tested may include: amplitude, slew rate, de-emphasis, and spread spectrum clocking.Type: ApplicationFiled: March 26, 2007Publication date: October 2, 2008Inventors: David T. Uddenberg, Gabriel L. Romero