Abstract: Described is a Neuromorphic Adaptive Core (NeurACore) cognitive signal processor (CSP) for wide instantaneous bandwidth denoising of noisy signals. The NeurACore CSP includes a NeurACore block, a globally learning layer, and a neural combiner. The NeurACore block is operable for receiving as an input a mixture of in-phase and quadrature (I/Q) signals and mapping the I/Q signals onto a neural network to determine complex-valued output weights of neural states of the neural network. The global learning layer is operable for adapting the complex-valued output weights to predict a most likely next value of the input I/Q signal. Further, the neural combiner is operable for combining a set of delayed neural state vectors with the weights of the global learning layer to compute an output signal, the output signal being separate in-phase and quadrature signals.

Abstract: Implementations provide denoising a signal. A plurality of reservoir state values are produced based on the signal and the plurality of reservoir state values are collected into a historical record. A plurality of reservoir state value weights are calculated based at least in part on the historical record to produce a plurality of output values. The plurality of reservoir state value weights are computed over multiple clock cycles of a clock for the cognitive signal processor system. The plurality of output values are output. A more accurate representation of a next of set of output layer weights is thereby obtained.

Abstract: Described is a cognitive signal processor that is implemented in a field programmable gate array (FPGA). During operation, the FGPA receives a continuous noisy signal. The continuous noisy signal is a time-series of data points from a mixture signal of waveforms having both noise and a desired waveform signal. The continuous noisy signal is linearly mapped to reservoir states of a dynamical reservoir. A high-dimensional state-space representation of the continuous noisy signal is generated by digitally combining the continuous noisy signal with the reservoir states. Notably, the continuous noisy signal is approximated over a time interval based on a linear basis function. One or more delay-embedded state signals are then generated based on the reservoir states. The continuous noisy signal is then denoised by removing the noise from the desired waveform signal, resulting in a denoised waveform signal.

Abstract: Disclosed is a hardware scalable channelizer (“HSC”). The HSC includes an integrated circuit (“IC”) that utilizes neuromorphic processing. The IC also includes an IC input configured to receive an input signal and a plurality of infinite impulse response (“IIR”) channelizer filters in signal communication with the IC input, where each IIR channelizer filter of the plurality of IIR channelizer filters is configured to select a frequency band from the input signal and provide synchronous filtering of the input signal.