Patents by Inventor Gadlel Seroussl

Gadlel Seroussl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Constant-weight-code-based addressing of nanoscale and mixed microscale/nanoscale arrays
    Patent number: 7489583
    Abstract: Various embodiments of the present invention include methods for determining nanowire addressing schemes and include microscale/nanoscale electronic devices that incorporate the nanowire addressing schemes for reliably addressing nanowire-junctions within nanowire crossbars. The addressing schemes allow for change in the resistance state, or other physical or electronic state, of a selected nanowire-crossbar junction without changing the resistance state, or other physical or electronic state, of the remaining nanowire-crossbar junctions, and without destruction of either the selected nanowire-crossbar junction or the remaining, non-selected nanowire-crossbar junctions. Additional embodiments of the present invention include nanoscale memory arrays and other nanoscale electronic devices that incorporate the nanowire-addressing-scheme embodiments of the present invention.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: February 10, 2009
    Inventors: Philip J. Kuekes, J. Warren Roblnett, Ron M. Roth, Gadlel Seroussl, Gregory S. Smider, R. Stanley Williams
  • Constant-weight-code-based addressing of nanoscale and mixed microscale/nanoscale arrays
    Publication number: 20070053378
    Abstract: Various embodiments of the present invention include methods for determining nanowire addressing schemes and include microscale/nanoscale electronic devices that incorporate the nanowire addressing schemes for reliably addressing nanowire-junctions within nanowire crossbars. The addressing schemes allow for change in the resistance state, or other physical or electronic state, of a selected nanowire-crossbar junction without changing the resistance state, or other physical or electronic state, of the remaining nanowire-crossbar junctions, and without destruction of either the selected nanowire-crossbar junction or the remaining, non-selected nanowire-crossbar junctions. Additional embodiments of the present invention include nanoscale memory arrays and other nanoscale electronic devices that incorporate the nanowire-addressing-scheme embodiments of the present invention.
    Type: Application
    Filed: September 6, 2005
    Publication date: March 8, 2007
    Inventors: Philip Kuekes, J. Roblnett, Ron Roth, Gadlel Seroussl, Gregory Smider, R. Williams