Patents by Inventor Gady Yearim

Gady Yearim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8166320
    Abstract: Forming a plurality of pipeline orderings, each pipeline ordering comprising one of a sequential, a parallel, or a sequential and parallel combination of a plurality of stages of a pipeline, analyzing the plurality of pipeline orderings to determine a total power of each of the orderings, and selecting one of the plurality of pipeline orderings based on the determined total power of each of the plurality of pipeline orderings.
    Type: Grant
    Filed: February 11, 2010
    Date of Patent: April 24, 2012
    Assignee: Intel Corporation
    Inventors: Ron Gabor, Hong Jiang, Alon Naveh, Doron Rajwan, James Varga, Gady Yearim, Yuval Yosef
  • Publication number: 20110013095
    Abstract: A projector and a system comprising a projector and a handheld device are described. In a preferred embodiment, a projector for projecting an image includes a back section and a front section. The back section has a bottom surface for resting on a supporting surface, and the front section has an optical window for projecting light indicative of the image. The front section is tilted with respect to the bottom surface of the back section to define a tilt angle. The system includes a video-output generating handheld device, and a display device controlled by control signals generated by the handheld device. The handheld device and the display device are interconnected with no more than one physical video signal connection.
    Type: Application
    Filed: June 17, 2010
    Publication date: January 20, 2011
    Applicant: X.D.M. LTD.
    Inventors: Meir Aloni, Gady Yearim, Elisha-Avraham Tal, Jacob Rand, Eyal Cremer
  • Publication number: 20100146314
    Abstract: Forming a plurality of pipeline orderings, each pipeline ordering comprising one of a sequential, a parallel, or a sequential and parallel combination of a plurality of stages of a pipeline, analyzing the plurality of pipeline orderings to determine a total power of each of the orderings, and selecting one of the plurality of pipeline orderings based on the determined total power of each of the plurality of pipeline orderings.
    Type: Application
    Filed: February 11, 2010
    Publication date: June 10, 2010
    Inventors: Ron Gabor, Hong Jiang, Alon Naveh, Doron Rajwan, James Varga, Gady Yearim, Yuval Yosef
  • Patent number: 7725745
    Abstract: Forming a plurality of pipeline orderings, each pipeline ordering comprising one of a sequential, a parallel, or a sequential and parallel combination of a plurality of stages of a pipeline, analyzing the plurality of pipeline orderings to determine a total power of each of the orderings, and selecting one of the plurality of pipeline orderings based on the determined total power of each of the plurality of pipeline orderings.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: May 25, 2010
    Assignee: Intel Corporation
    Inventors: Ron Gabor, Hong Jiang, Alon Naveh, Doron Rajwan, James Varga, Gady Yearim, Yuval Yosef
  • Patent number: 7391416
    Abstract: Method and system for fine tuning frequency and phase of a sampling clock of analog signals (R, G, B) having digital information, for sampling the analog signals within an optimal sampling period, enabling optimal display by a digital display device (92). Small amount of information from input signals is required for rapidly and accurately determining values of frequency and phase of the sampling clock. After measuring using a measurement system (96) and obtaining pixel values while sweeping phase values of signals using a phase locked loop (PLL) mechanism (48), there is determining values of two parameters, (i) error of an initial frequency value of the sampling clock (Rx clock), proportional to error of an initial phase locked loop (PLL) division factor value, and (ii) phase of the sampling clock, without need for making additional measurements based on these values, using a control unit (94).
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: June 24, 2008
    Assignee: Oplus Technologies, Inc.
    Inventor: Gady Yearim
  • Publication number: 20080148076
    Abstract: Forming a plurality of pipeline orderings, each pipeline ordering comprising one of a sequential, a parallel, or a sequential and parallel combination of a plurality of stages of a pipeline, analyzing the plurality of pipeline orderings to determine a total power of each of the orderings, and selecting one of the plurality of pipeline orderings based on the determined total power of each of the plurality of pipeline orderings.
    Type: Application
    Filed: December 19, 2006
    Publication date: June 19, 2008
    Inventors: Ron Gabor, Hong Jiang, Alon Naveh, Doron Rajwan, James Varga, Gady Yearim, Yuval Yosef
  • Publication number: 20060107294
    Abstract: An integrated video processing circuit (VPC) and method for providing a displayed visual user interface for the display, selection and setup of video input sources on a shared display. A VPC processes video from two or more video input sources, where some subset of the two or more video input sources receive video from a respective device. The VPC creates on the display a visual user interface consisting of live or interval-updated video providing simultaneously (e.g., in a mosaic of windows) a visual indication of the status of some or all of the video input sources. The VPC allows for the easy selection and setup of the respective devices via the user interface on the display and an input device (e.g., a remote control device).
    Type: Application
    Filed: November 14, 2005
    Publication date: May 18, 2006
    Inventors: Ze'ev Rivlin, Yair Alpern, Gady Yearim
  • Publication number: 20050020228
    Abstract: Method and system for fine tuning frequency and phase of a sampling clock of analog signals (R, G, B) having digital information, for sampling the analog signals within an optimal sampling period, enabling optimal display by a digital display device (92). Small amount of information from input signals is required for rapidly and accurately determining values of frequency and phase of the sampling clock. After measuring using a measurement system (96) and obtaining pixel values while sweeping phase values of signals using a phase locked loop (PLL) mechanism (48), there is determining values of two parameters, (i) error of an initial frequency value of the sampling clock (Rx clock), proportional to error of an initial phase locked loop (PLL) division factor value, and (ii) phase of the sampling clock, without need for making additional measurements based on these values, using a control unit (94).
    Type: Application
    Filed: December 26, 2002
    Publication date: January 27, 2005
    Inventor: Gady Yearim
  • Patent number: 6191827
    Abstract: A method of electronic Keystone correction for electronic devices having visual displays which exhibit optical distortion on the display screen. The corrective method is based on computation and electronic (physical) manipulation of the pixels of a visual display screen grid, and features the principle steps of: 1) characterization of the size of an input image, 2) determination of the number of generated pixels in the output image, 3) determination of the real position of each pixel in the output image by performing an electronic distortion to the input image opposite to the optical distortion of the input image, 4) interpolation of the output value of all color components of each pixel of the input image, 5) correction of (non-uniform) edge effects at both ends of each line of pixels, 6) transmission of the output corrected image to the electronic display device, individually, pixel by pixel, or as complete set of corrected pixels of the image, and 7) display of the perfected corrected optical image.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: February 20, 2001
    Assignee: Oplus Technologies Ltd.
    Inventors: Yosef Segman, Gady Yearim, Avy Strominger