Patents by Inventor Gaetan Mathiew

Gaetan Mathiew has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5977618
    Abstract: A connection component for electrically connecting a semiconductor chip to a support substrate incorporates a preferably dielectric supporting structure defining gaps. Leads extend across these gaps so that the leads are supported on both sides of the gap. The leads therefore can be positioned approximately in registration to contacts on the chip by aligning the connection component with the chip. Each lead is arranged so that one end can be displaced relative to the supporting structure when a downward force is applied to the lead. This allows the leads to be connected to the contacts on the chip by engaging each lead with a tool and forcing the lead downwardly against the contact. Preferably, each lead incorporates a frangible section adjacent one side of the gap and the frangible section is broken when the lead is engaged with the contact. Final alignment of the leads with the contacts on the chip is provided by the bonding tool, which has features adapted to control the position of the lead.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: November 2, 1999
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Gary W. Grube, Igor Y. Khandros, Gaetan Mathiew
  • Patent number: 5787581
    Abstract: A connection component for electrically connecting a semiconductor chip to a support substrate incorporates a preferably dielectric supporting structure defining gaps. Leads extend across these gaps so that the leads are supported on both sides of the gap. The leads therefore can be positioned approximately in registration to contacts on the chip by aligning the connection component with the chip. Each lead is arranged so that one end can be displaced relative to the supporting structure when a downward force is applied to the lead. This allows the leads to be connected to the contacts on the chip by engaging each lead with a tool and forcing the lead downwardly against the contact. Preferably, each lead incorporates a frangible section adjacent one side of the gap and the frangible section is broken when the lead is engaged with the contact. Final alignment of the leads with the contacts on the chip is provided by the bonding tool, which has features adapted to control the position of the lead.
    Type: Grant
    Filed: August 17, 1995
    Date of Patent: August 4, 1998
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Gary W. Grube, Igor Y. Khandros, Gaetan Mathiew
  • Patent number: 5536909
    Abstract: A connection component for electrically connecting a semiconductor chip to a support substrate incorporates a preferably dielectric supporting structure defining gaps. Leads extend across these gaps so that the leads are supported on both sides of the gap. The leads therefore can be positioned approximately in registration to contacts on the chip by aligning the connection component with the chip. Each lead is arranged so that one end can be displaced relative to the supporting structure when a downward force is applied to the lead. This allows the leads to be connected to the contacts on the chip by engaging each lead with a tool and forcing the lead downwardly against the contact. Preferably, each lead incorporates a frangible section adjacent one side of the gap and the frangible section is broken when the lead is engaged with the contact. Final alignment of the leads with the contacts on the chip is provided by the bonding tool, which has features adapted to control the position of the lead.
    Type: Grant
    Filed: October 13, 1994
    Date of Patent: July 16, 1996
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Gary W. Grube, Igor Y. Khandros, Gaetan Mathiew
  • Patent number: 5489749
    Abstract: A connection component for electrically connecting a semiconductor chip to a support substrate incorporates a preferably dielectric supporting structure defining gaps. Leads extend across these gaps so that the leads are supported on both sides of the gap. The leads therefore can be positioned approximately in registration to contacts on the chip by aligning the connection component with the chip. Each lead is arranged so that one end can be displaced relative to the supporting structure when a downward force is applied to the lead. This allows the leads to be connected to the contacts on the chip by engaging each lead with a tool and forcing the lead downwardly against the contact. Preferably, each lead incorporates a frangible section adjacent one side of the gap and the frangible section is broken when the lead is engaged with the contact. Final alignment of the leads with the contacts on the chip is provided by the bonding tool, which has features adapted to control the position of the lead.
    Type: Grant
    Filed: June 29, 1994
    Date of Patent: February 6, 1996
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Gary W. Grube, Igor Y. Khandros, Gaetan Mathiew
  • Patent number: 5390844
    Abstract: A bonding tool for bonding inner leads to semiconductor chips is arranged to capture and align elongated lead sections extending in any one of plural directions, and preferably, in any one of two mutually orthogonal directions. Thus, the tool can be applied to align and bond all of the leads to a chip without turning the tool or the chip even where the leads extend in multiple directions.
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: February 21, 1995
    Assignee: Tessera, Inc.
    Inventors: Thomas H. Distefano, Igor Y. Khandros, Gaetan Mathiew, Jason Sweis, John Grange, Gary W. Grube