Patents by Inventor Gaetano Palumbo

Gaetano Palumbo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7256640
    Abstract: Protecting the devices of a charge pump includes the connection of a high-voltage transistor between the output node of the charge pump and the load being supplied, and in controlling this transistor with a fraction of the output voltage of the charge pump. This control is accomplished by connecting the control node of the high-voltage transistor to a node of connection between two stages of the multi-stage charge pump onto which a fraction of the controlled output voltage of the multi-stage charge pump is produced. The high-voltage output transistor protects the low voltage devices of the multi-stage charge pump, by preventing the controlled output voltage from undergoing excessively abrupt variations, that could damage the transistors of the last stage of the charge pump.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: August 14, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventors: Carmelo Ucciardello, Rosa Di Mauro, Domenico Pappalardo, Francesco Sorrentino, Giuseppe Maganuco, Gaetano Palumbo
  • Patent number: 7224206
    Abstract: A charge pump is proposed. The charge pump is integrated in a chip of semiconductor material and includes a plurality of capacitive elements each one connected to a corresponding circuit node of the charge pump, the circuit nodes being arranged in a sequence from an input node to an output node, a plurality of field effect transistors each one for selectively connecting a corresponding first circuit node with a second adjacent circuit node, each transistor being made in a corresponding insulated body region, and for each transistor first biasing means for equalizing the body region with the first circuit node when the transistor is closed, wherein for each transistor the charge pump further includes second biasing means for equalizing the body region with the second circuit node when the transistor is opened.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: May 29, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventors: Domenico Pappalardo, Carmelo Ucciardello, Gaetano Palumbo
  • Patent number: 7095268
    Abstract: A single-stage clock booster produces a boosted clock voltage on an output node that is a multiple of a supply voltage. The single-stage clock booster includes a pump capacitor having a first terminal being driven by a first control phase signal. A first switch is controlled by the boosted clock voltage for connecting a second terminal of the pump capacitor to the supply voltage during a charge phase. A second switch connects the second terminal of the pump capacitor to the output node during a boosted clock voltage output phase. A switching circuit alternately connects a control node of the second switch to the supply voltage and to the first terminal of the pump capacitor. The switching circuit is driven by a second control phase signal. A third switch is controlled by a third control phase signal for connecting the output node to a reference voltage during the charge phase.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: August 22, 2006
    Assignee: STMicroelectronics S.r.l.
    Inventors: Domenico Pappalardo, Carmelo Ucciardello, Gaetano Palumbo, Paolo Scalisi
  • Publication number: 20060152273
    Abstract: A single-stage clock booster produces a boosted clock voltage on an output node that is a multiple of a supply voltage. The single-stage clock booster includes a pump capacitor having a first terminal being driven by a first control phase signal. A first switch is controlled by the boosted clock voltage for connecting a second terminal of the pump capacitor to the supply voltage during a charge phase. A second switch connects the second terminal of the pump capacitor to the output node during a boosted clock voltage output phase. A switching circuit alternately connects a control node of the second switch to the supply voltage and to the first terminal of the pump capacitor. The switching circuit is driven by a second control phase signal. A third switch is controlled by a third control phase signal for connecting the output node to a reference voltage during the charge phase.
    Type: Application
    Filed: January 11, 2005
    Publication date: July 13, 2006
    Applicant: STMicroelectronics S.r.I.
    Inventors: Domenico Pappalardo, Carmelo Ucciardello, Gaetano Palumbo, Paolo Scalisi
  • Publication number: 20060145747
    Abstract: Protecting the devices of a charge pump includes the connection of a high-voltage transistor between the output node of the charge pump and the load being supplied, and in controlling this transistor with a fraction of the output voltage of the charge pump. This control is accomplished by connecting the control node of the high-voltage transistor to a node of connection between two stages of the multi-stage charge pump onto which a fraction of the controlled output voltage of the multi-stage charge pump is produced. The high-voltage output transistor protects the low voltage devices of the multi-stage charge pump, by preventing the controlled output voltage from undergoing excessively abrupt variations, that could damage the transistors of the last stage of the charge pump.
    Type: Application
    Filed: January 3, 2005
    Publication date: July 6, 2006
    Applicant: STMicroelectronics S.r.l.
    Inventors: Carmelo Ucciardello, Rosa Di Mauro, Domenico Pappalardo, Francesco Sorrentino, Giuseppe Maganuco, Gaetano Palumbo
  • Publication number: 20050200399
    Abstract: A charge pump is proposed. The charge pump is integrated in a chip of semiconductor material and includes a plurality of capacitive elements each one connected to a corresponding circuit node of the charge pump, the circuit nodes being arranged in a sequence from an input node to an output node, a plurality of field effect transistors each one for selectively connecting a corresponding first circuit node with a second adjacent circuit node, each transistor being made in a corresponding insulated body region, and for each transistor first biasing means for equalizing the body region with the first circuit node when the transistor is closed, wherein for each transistor the charge pump further includes second biasing means for equalizing the body region with the second circuit node when the transistor is opened.
    Type: Application
    Filed: February 24, 2005
    Publication date: September 15, 2005
    Applicant: STMicroelectronics S.r.l.
    Inventors: Domenico Pappalardo, Carmelo Ucciardello, Gaetano Palumbo
  • Patent number: 6927441
    Abstract: A variable charge pump contains several individual simple charge pumps, each with a pumping capacitor and a switching mechanism. Additionally, a switching network is coupled to the individual charge pumps so that the different lines in the charge pump can be connected together in a serial mode or parallel mode (or mixed serial and parallel modes) to match the needs of the output load. The switching network is easily changed to provide the necessary driving capability as the needs of the output load changes.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: August 9, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Domenico Pappalardo, Maurizio Gaibotti, Gaetano Palumbo, Antonino Conte, Stefano Lo Giudice
  • Patent number: 6690755
    Abstract: A circuit for detecting signals present on a bifilar voltage-supply and signal-transmission line, in which the signals are constituted by positive and negative variations of the supply potential of at least one of the wires of the line, the circuit including a low-pass filter connected to the two wires of the line in order to supply, at an output terminal of the filter, a constant reference potential substantially equal to the supply potential of a preselected one of the two wires, a first threshold comparator having a reference input terminal and a threshold input terminal connected, respectively, to the output terminal of the filter and to the preselected wire of the two wires, and a second threshold comparator having a reference input terminal and a threshold input terminal connected, respectively, to the preselected wire of the two wires and to the output terminal of the filter.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: February 10, 2004
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Pulvirenti, Gregorio Bontempo, Gaetano Palumbo
  • Publication number: 20020163376
    Abstract: A variable charge pump contains several individual simple charge pumps, each with a pumping capacitor and a switching mechanism. Additionally, a switching network is coupled to the individual charge pumps so that the different lines in the charge pump can be connected together in a serial mode or parallel mode (or mixed serial and parallel modes) to match the needs of the output load. The switching network is easily changed to provide the necessary driving capability as the needs of the output load changes.
    Type: Application
    Filed: January 15, 2002
    Publication date: November 7, 2002
    Applicant: STMicroelectronics S.r.I.
    Inventors: Domenico Pappalardo, Maurizio Gaibotti, Gaetano Palumbo, Antonino Conte, Stefano Lo Giudice
  • Patent number: 6292405
    Abstract: A data output buffer includes an output node, and a first stage connected to the output node for providing a first control signal for precharging the output node to an intermediate voltage with respect to a voltage for switching the output node from a current logic state to a different logic state. A second stage is connected to the first stage and to the output buffer. The first and second stages are responsive to a second control signal for enabling output of new data. A precharge logic circuit precharges the output node to the intermediate voltage as a function of data last output, and as a function of first and second reset signals until a rising and falling edge of the data last output respectively crosses the intermediate voltage.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: September 18, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Salvatore Nicosia, Giovanni Pagano, Luca Giuseppe De Ambroggi, Gaetano Palumbo