Abstract: A method, apparatus, and machine readable storage medium is disclosed for performing network address translation (NAT) on fragments of a Internet Protocol (IP) packet, comprising: receiving a packet fragment of the packet; calculating a hash key based on a subset of header information in the fragment; if the packet fragment is the first fragment of the packet; initiating a NAT session for the packet; storing the NAT session identifier at an entry in the linked list indexed by the hash key; and if the packet fragment is not the first fragment of the packet, then: retrieving a NAT session identifier, if available, at an entry in said linked list indexed by said hash key; and performing NAT on the fragment using the NAT session identified by the NAT session identifier. The hash key is a subset of a CRC32 calculation performed on: IPv4 source address; IPv4 destination address; and IP Identifier of the fragment.

Abstract: A method, apparatus, and machine readable storage medium is disclosed for performing network address translation (NAT) on fragments of a Internet Protocol (IP) packet, comprising: receiving a packet fragment of the packet; calculating a hash key based on a subset of header information in the fragment; if the packet fragment is the first fragment of the packet; initiating a NAT session for the packet; storing the NAT session identifier at an entry in the linked list indexed by the hash key; and if the packet fragment is not the first fragment of the packet, then: retrieving a NAT session identifier, if available, at an entry in said linked list indexed by said hash key; and performing NAT on the fragment using the NAT session identified by the NAT session identifier. The hash key is a subset of a CRC32 calculation performed on: IPv4 source address; IPv4 destination address; and IP Identifier of the fragment.

Abstract: Electronic memory update methods, systems, and related data structures are disclosed. When a memory update is to be performed, a first section of the memory is updated to store a first software code segment, under control of a second software code segment stored in a second section of the memory. The second section of the memory is then updated under control of the first software code segment, after completion of updating the first software code segment. An incomplete update of one of the first and second sections of memory may be subsequently detected and remedied by executing the software code segment stored in the other of the first and second sections of the memory. The risk and effects of incomplete memory updates are thereby substantially reduced.

Abstract: Electronic memory update methods, systems, and related data structures are disclosed. When a memory update is to be performed, a first section of the memory is updated to store a first software code segment, under control of a second software code segment stored in a second section of the memory. The second section of the memory is then updated under control of the first software code segment, after completion of updating the first software code segment. An incomplete update of one of the first and second sections of memory may be subsequently detected and remedied by executing the software code segment stored in the other of the first and second sections of the memory. The risk and effects of incomplete memory updates are thereby substantially reduced.