Patents by Inventor Gal Pitarasho

Gal Pitarasho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9893747
    Abstract: A modulator and demodulator pair may switch configurations without introducing errors as a result of the switch. Different configurations may, for example, correspond to different symbol rates and/or different amounts of controlled inter-symbol interference (ISI) introduced to the transmitted signal. For example, a first configuration may use be a near-zero ISI configuration (e.g., using Nyquist signaling) and a second configuration may introduce a significant (e.g., amount that would result in errors above a desired threshold if demodulation relied on symbol-by-symbol slicing) but controlled amount of ISI (e.g., using partial response or faster-than-Nyquist-rate signaling). Switching between modulator/demodulator configurations may be needed to maintain a stable link in the case of dynamic channels. At any given time, a modulator and demodulator pair may, for example, switch to a configuration that provides maximal throughput for the current channel conditions.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: February 13, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Amos Intrater, Amir Eliaz, Shlomy Chaikin, Gal Pitarasho
  • Publication number: 20160248457
    Abstract: A modulator and demodulator pair may switch configurations without introducing errors as a result of the switch. Different configurations may, for example, correspond to different symbol rates and/or different amounts of controlled inter-symbol interference (ISI) introduced to the transmitted signal. For example, a first configuration may use be a near-zero ISI configuration (e.g., using Nyquist signaling) and a second configuration may introduce a significant (e.g., amount that would result in errors above a desired threshold if demodulation relied on symbol-by-symbol slicing) but controlled amount of ISI (e.g., using partial response or faster-than-Nyquist-rate signaling). Switching between modulator/demodulator configurations may be needed to maintain a stable link in the case of dynamic channels. At any given time, a modulator and demodulator pair may, for example, switch to a configuration that provides maximal throughput for the current channel conditions.
    Type: Application
    Filed: March 1, 2016
    Publication date: August 25, 2016
    Applicant: MagnaCom Ltd.
    Inventors: Amos Intrater, Amir Eliaz, Shlomy Chaikin, Gal Pitarasho
  • Publication number: 20160099818
    Abstract: A receiver is configured to receive a sample of an inter-symbol correlated (ISC) signal, the sample corresponding to a time instant when phase and/or amplitude of the ISC signal is a result of correlation among a plurality of symbols of a transmitted symbol sequence. The receiver may linearize the sample of the ISC signal. The receiver may calculate a residual signal value based on the linearized sample of the ISC signal. The receiver may generate an estimate of one or more of said plurality of symbols based on a slicing of the residual signal value. The linearization may comprise applying an estimate of an inverse of a non-linear model. The non-linear model may be a model of nonlinearity experienced by the ISC signal in a transmitter from which the ISC signal originated, in a channel through which the ISC signal passed en route to the receiver, and/or in a front-end of the receiver.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Amir Eliaz, Ilan Reuven, Gal Pitarasho
  • Patent number: 9276619
    Abstract: A modulator and demodulator pair may switch configurations without introducing errors as a result of the switch. Different configurations may, for example, correspond to different symbol rates and/or different amounts of controlled inter-symbol interference (ISI) introduced to the transmitted signal. For example, a first configuration may use be a near-zero ISI configuration (e.g., using Nyquist signaling) and a second configuration may introduce a significant (e.g., amount that would result in errors above a desired threshold if demodulation relied on symbol-by-symbol slicing) but controlled amount of ISI (e.g., using partial response or faster-than-Nyquist-rate signaling). Switching between modulator/demodulator configurations may be needed to maintain a stable link in the case of dynamic channels. At any given time, a modulator and demodulator pair may, for example, switch to a configuration that provides maximal throughput for the current channel conditions.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: March 1, 2016
    Assignee: MagnaCom Ltd.
    Inventors: Amos Intrater, Amir Eliaz, Shlomy Chaikin, Gal Pitarasho
  • Patent number: 9215102
    Abstract: A receiver is configured to receive a sample of an inter-symbol correlated (ISC) signal, the sample corresponding to a time instant when phase and/or amplitude of the ISC signal is a result of correlation among a plurality of symbols of a transmitted symbol sequence. The receiver may linearize the sample of the ISC signal. The receiver may calculate a residual signal value based on the linearized sample of the ISC signal. The receiver may generate an estimate of one or more of said plurality of symbols based on a slicing of the residual signal value. The linearization may comprise applying an estimate of an inverse of a non-linear model. The non-linear model may be a model of nonlinearity experienced by the ISC signal in a transmitter from which the ISC signal originated, in a channel through which the ISC signal passed en route to the receiver, and/or in a front-end of the receiver.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: December 15, 2015
    Assignee: MagnaCom Ltd.
    Inventors: Amir Eliaz, Ilan Reuven, Gal Pitarasho
  • Patent number: 9088400
    Abstract: A sequence estimation circuit of a receiver may receive a sample of an inter-symbol correlated (ISC) signal corresponding to a time instant when phase and/or amplitude of the ISC signal is a result of correlation among a plurality of symbols of a transmitted symbol sequence. The sequence estimation circuit may calculate a residual signal value based on the sample of the ISC signal and based on a survivor sequence. The sequence estimation circuit may generate one or more branch vector hypotheses based on the residual signal value, where each of the hypotheses comprises a plurality of symbols. The sequence estimation circuit may generate an estimate of one or more of the plurality of transmitted symbols based on the one or more branch vector hypotheses.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: July 21, 2015
    Assignee: MagnaCom Ltd.
    Inventors: Amir Eliaz, Ilan Reuven, Gal Pitarasho
  • Publication number: 20150131759
    Abstract: A receiver is configured to receive a sample of an inter-symbol correlated (ISC) signal, the sample corresponding to a time instant when phase and/or amplitude of the ISC signal is a result of correlation among a plurality of symbols of a transmitted symbol sequence. The receiver may linearize the sample of the ISC signal. The receiver may calculate a residual signal value based on the linearized sample of the ISC signal. The receiver may generate an estimate of one or more of said plurality of symbols based on a slicing of the residual signal value. The linearization may comprise applying an estimate of an inverse of a non-linear model. The non-linear model may be a model of nonlinearity experienced by the ISC signal in a transmitter from which the ISC signal originated, in a channel through which the ISC signal passed en route to the receiver, and/or in a front-end of the receiver.
    Type: Application
    Filed: July 9, 2014
    Publication date: May 14, 2015
    Inventors: Amir Eliaz, Ilan Reuven, Gal Pitarasho
  • Publication number: 20150070089
    Abstract: In accordance with an example implementation of this disclosure, a receiver may comprise a signal reconstruction circuit and a nonlinearity modeling circuit. The nonlinearity modeling circuit may be operable to generate a look-up table (LUT)-based model of nonlinear distortion present in a received signal. An entry of the LUT may comprise a signal power parameter value and a distortion parameter value. The signal reconstruction circuit may be operable to generate one or more candidates for a transmitted signal corresponding to the received signal. The signal reconstruction circuit may be operable to distort the one or more candidates according to the model, the distortion resulting in one or more reconstructed signals. The signal reconstruction circuit may be operable to decide a best one of the candidates based on the one or more reconstructed signals.
    Type: Application
    Filed: September 9, 2014
    Publication date: March 12, 2015
    Inventors: Amir Eliaz, Ilan Reuven, Gal Pitarasho
  • Publication number: 20150043684
    Abstract: A sequence estimation circuit of a receiver may receive a sample of an inter-symbol correlated (ISC) signal corresponding to a time instant when phase and/or amplitude of the ISC signal is a result of correlation among a plurality of symbols of a transmitted symbol sequence. The sequence estimation circuit may calculate a residual signal value based on the sample of the ISC signal and based on a survivor sequence. The sequence estimation circuit may generate one or more branch vector hypotheses based on the residual signal value, where each of the hypotheses comprises a plurality of symbols. The sequence estimation circuit may generate an estimate of one or more of the plurality of transmitted symbols based on the one or more branch vector hypotheses.
    Type: Application
    Filed: August 18, 2014
    Publication date: February 12, 2015
    Inventors: Amir Eliaz, Ilan Reuven, Gal Pitarasho
  • Patent number: 8811548
    Abstract: A sequence estimation circuit of a receiver may receive a sample of an inter-symbol correlated (ISC) signal corresponding to a time instant when phase and/or amplitude of the ISC signal is a result of correlation among a plurality of symbols of a transmitted symbol sequence. The sequence estimation circuit may calculate a residual signal value based on the sample of the ISC signal and based on a survivor sequence. The sequence estimation circuit may generate one or more branch vector hypotheses based on the residual signal value, where each of the hypotheses comprises a plurality of symbols. The sequence estimation circuit may generate an estimate of one or more of the plurality of transmitted symbols based on the one or more branch vector hypotheses.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: August 19, 2014
    Assignee: MagnaCom, Ltd.
    Inventors: Amir Eliaz, Ilan Reuven, Gal Pitarasho
  • Patent number: 8804879
    Abstract: A receiver is configured to receive a sample of an inter-symbol correlated (ISC) signal, the sample corresponding to a time instant when phase and/or amplitude of the ISC signal is a result of correlation among a plurality of symbols of a transmitted symbol sequence. The receiver may linearize the sample of the ISC signal. The receiver may calculate a residual signal value based on the linearized sample of the ISC signal. The receiver may generate an estimate of one or more of said plurality of symbols based on the residual signal value. The linearization may comprise applying an estimate of an inverse of a non-linear model. The non-linear model may be a model of nonlinearity experienced by the ISC signal in a transmitter from which the ISC signal originated, in a channel through which the ISC signal passed en route to the receiver, and/or in a front-end of the receiver.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: August 12, 2014
    Assignee: MagnaCom Ltd.
    Inventors: Amir Eliaz, Ilan Reuven, Gal Pitarasho
  • Publication number: 20140133608
    Abstract: A sequence estimation circuit of a receiver may receive a sample of an inter-symbol correlated (ISC) signal corresponding to a time instant when phase and/or amplitude of the ISC signal is a result of correlation among a plurality of symbols of a transmitted symbol sequence. The sequence estimation circuit may calculate a residual signal value based on the sample of the ISC signal and based on a survivor sequence. The sequence estimation circuit may generate one or more branch vector hypotheses based on the residual signal value, where each of the hypotheses comprises a plurality of symbols. The sequence estimation circuit may generate an estimate of one or more of the plurality of transmitted symbols based on the one or more branch vector hypotheses.
    Type: Application
    Filed: November 13, 2013
    Publication date: May 15, 2014
    Applicant: MagnaCom Ltd.
    Inventors: Amir Eliaz, Ilan Reuven, Gal Pitarasho