Abstract: A firing circuit for a thermal inkjet-printing nozzle includes a heater resistor and a switch. The heater resistor heats ink to cause the ink to be ejected from the nozzle. The heater resistor has a first end and a second end, the second end connected to a ground. The switch controls activation of the heater resistor. The switch has a first end connected to a voltage source and a second end connected to the first end of the heater resistor. The switch operates in a constant current mode, such that an at least substantially constant current flows through the heater resistor upon activation.

Abstract: A firing circuit for a thermal inkjet-printing nozzle includes a heater resistor and a switch. The heater resistor heats ink to cause the ink to be ejected from the nozzle. The heater resistor has a first end and a second end, the second end connected to a ground. The switch controls activation of the heater resistor. The switch has a first end connected to a voltage source and a second end connected to the first end of the heater resistor. The switch operates in a constant current mode, such that an at least substantially constant current flows through the heater resistor upon activation.

Abstract: A firing circuit for a thermal inkjet-printing nozzle includes a heater resistor and a switch. The heater resistor heats ink to cause the ink to be ejected from the nozzle. The heater resistor has a first end and a second end, the second end connected to a ground. The switch controls activation of the heater resistor. The switch has a first end connected to a voltage source and a second end connected to the first end of the heater resistor. The switch operates in a constant current mode, such that an at least substantially constant current flows through the heater resistor upon activation.

Abstract: A firing circuit for a thermal inkjet-printing nozzle includes a heater resistor and a switch. The heater resistor heats ink to cause the ink to be ejected from the nozzle. The heater resistor has a first end and a second end, the second end connected to a ground. The switch controls activation of the heater resistor. The switch has a first end connected to a voltage source and a second end connected to the first end of the heater resistor. The switch operates in a constant current mode, such that an at least substantially constant current flows through the heater resistor upon activation.

Abstract: A firing circuit for a thermal inkjet-printing nozzle includes a heater resistor and a switch. The heater resistor heats ink to cause the ink to be ejected from the nozzle. The heater resistor has a first end and a second end, the second end connected to a ground. The switch controls activation of the heater resistor. The switch has a first end connected to a voltage source and a second end connected to the first end of the heater resistor. The switch operates in a constant current mode, such that an at least substantially constant current flows through the heater resistor upon activation.

Abstract: A nanoscopic transistor is made by forming an oxide layer on a semiconductor substrate, applying resist, patterning the resist using imprint lithography to form a pattern aligned along a first direction, applying a first ion-masking material over the pattern, selectively lifting it off to leave a first ion mask to form a gate, forming doped regions by implanting a suitable dopant, applying another layer of resist and patterning the second resist layer using imprint lithography to form a second pattern aligned along a second direction, applying a second ion-masking material over the second pattern, selectively lifting it off to leave a second ion mask defined by the second pattern, and forming second doped regions in the substrate by implanting a suitable second dopant selectively in accordance with the second ion mask. The method may be used to make an array of nanoscopic transistors.

Abstract: A nanoscopic transistor is made by forming an oxide layer on a semiconductor substrate, applying resist, patterning the resist using imprint lithography to form a pattern aligned along a first direction, applying a first ion-masking material over the pattern, selectively lifting it off to leave a first ion mask to form a gate, forming doped regions by implanting a suitable dopant, applying another layer of resist and patterning the second resist layer using imprint lithography to form a second pattern aligned along a second direction, applying a second ion-masking material over the second pattern, selectively lifting it off to leave a second ion mask defined by the second pattern, and forming second doped regions in the substrate by implanting a suitable second dopant selectively in accordance with the second ion mask. The method may be used to make an array of nanoscopic transistors.

Abstract: A nanoscopic transistor is made by forming an oxide layer on a semiconductor substrate, applying resist, patterning the resist using imprint lithography to form a pattern aligned along a first direction, applying a first ion-masking material over the pattern, selectively lifting it off to leave a first ion mask to form a gate, forming doped regions by implanting a suitable dopant, applying another layer of resist and patterning the second resist layer using imprint lithography to form a second pattern aligned along a second direction, applying a second ion-masking material over the second pattern, selectively lifting it off to leave a second ion mask defined by the second pattern, and forming second doped regions in the substrate by implanting a suitable second dopant selectively in accordance with the second ion mask. The method may be used to make an array of nanoscopic transistors.

Abstract: This disclosure relates to misalignment-tolerant processes for fabricating multiplexing/demultiplexing architectures. One process enables fabricating a multiplexing/demultiplexing architecture at a tolerance greater than a pitch of conductive structures with which the architecture is capable of communicating. Another process can enable creation of address elements and conductive structures having substantially identical widths.

Abstract: This disclosure relates to misalignment-tolerant multiplexing/demultiplexing architectures. One architecture enables communication with a conductive-structure array having a narrow spacing and pitch. Another architecture can comprise address elements having a width substantially identical to that of conductive-structures with which each of these address elements is capable of communicating. Another architecture can comprise rows of co-parallel address elements oriented obliquely relative to address lines and/or conductive structures.

Abstract: A nanoscopic transistor is made by forming an oxide layer on a semiconductor substrate, applying resist, patterning the resist using imprint lithography to form a pattern aligned along a first direction, applying a first ion-masking material over the pattern, selectively lifting it off to leave a first ion mask to form a gate, forming doped regions by implanting a suitable dopant, applying another layer of resist and patterning the second resist layer using imprint lithography to form a second pattern aligned along a second direction, applying a second ion-masking material over the second pattern, selectively lifting it off to leave a second ion mask defined by the second pattern, and forming second doped regions in the substrate by implanting a suitable second dopant selectively in accordance with the second ion mask. The method may be used to make an array of nanoscopic transistors.

Abstract: A semiconductor antifuse device that utilizes a resistive heating element as both a heating source or fuse blowing and as part of the fuse link. The antifuse device may also be utilized as a fuse and the antifuse or fuse embodiment can be programmed and read with the same two electrodes. The antifuse or fuse is well suited for use and efficient fabrication in a printhead apparatus or other circuit arrangements.

Abstract: A semiconductor antifuse device that utilizes a resistive heating element as both a heating source or fuse blowing and as part of the fuse link. The antifuse device may also be utilized as a fuse and the antifuse or fuse embodiment can be programmed and read with the same two electrodes. The antifuse or fuse is well suited for use and efficient fabrication in a printhead apparatus or other circuit arrangements.

Abstract: An electrical contact apparatus for use in a plama or glow discharge chamber, particularly a chamber for depositing silicon oxynitride. A feedthrough member provides an electrical path between the interior and exterior of the chamber. An electrical contact member having an outwardly domed surface engages the feedthrough member. A non-conductive collar is disposed about the domed surface for limiting the flow of gas around the domed surface.

Abstract: A method of depositing a thin film of silicon oxynitride (Si.sub.x O.sub.y N.sub.z) onto a semiconductor substrate utilizing dual frequency plasma enhanced chemical vapor deposition (PECVD). Plasma formation is achieved by striking gases in a reaction chamber with a high voltage, low frequency radio wave, and then triggering and applying with the leading or trailing edge of the striking pulse, a second high frequency, low power radio wave. The plasma transfers energy into reactant gases forming a thin film of silicon oxynitride (Si.sub.x O.sub.y N.sub.z) onto a semiconductor substrate. The high frequency pulses provides more efficient gas ionization and less pattern, and back oxide sensitivity to film deposition rate.