Abstract: Apparatuses and methods for utilizing error correction code in a data buffer or data storage device. In one variation, a single memory device is utilized to store both the data and the associated error correction code. The data and the associate error correction codes are stored on separate memory banks on the memory device. The error correction code may be consolidated into one or more regions on the memory device to improve the utilization of the available memory space on the memory device. In addition, by utilizing separate memory banks to store the data and the associated error correction code, the data and the error correction code can be accessed in an overlapping manner.

Abstract: A method, circuit and drive for improving clock recovery in clock/data signals are provided. A timing reference is provided to a locking loop circuit, such as a PLL. The timing reference is updated based on an expectation of a frequency of a clock being recovered. A system clock tracked to each clock being recovered is outputted. A current frequency of each system clock is approximated, and the expectation updated based on the approximated current frequency of one or more of the system clocks. If the data stream includes data separated into a series of blocks, the update may be made after an end of a block and before a beginning of a succeeding block. The approximation may be made periodically and/or numerous times for each block.

Abstract: A method and apparatus for encoding a sequence of input data into a sequence of coded data, where the coded data is represented as literal data, as single-character references to recent input data, and as a references to one or more past input data. The references may be fixed in length or variable in length. The references may include an indication of a match offset and/or an indication of a match length.