Patents by Inventor Ganesan Radhakrishnan

Ganesan Radhakrishnan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096636
    Abstract: Methods for polishing bulk silicon are disclosed. In one aspect, mechanical polishing is facilitated by cyclically alternating between a silicon reactive slurry and deionized water while a mechanical polishing head operates on a surface. In exemplary aspects, the polishing head is polishing a bulk silicon carrier wafer to expose a backside of a radio frequency (RF) complementary metal oxide semiconductor (CMOS) switch, although other semiconductors may also benefit from exemplary aspects of the present disclosure. While the silicon slurry is present, a reaction between the bulk silicon and the slurry takes place allowing the polishing head to remove the bulk silicon. The deionized water interrupts this reaction and helps prevent overpolishing which might otherwise damage the device.
    Type: Application
    Filed: July 3, 2023
    Publication date: March 21, 2024
    Inventors: Krishna Chetry, Ganesan Radhakrishnan
  • Publication number: 20240038582
    Abstract: The present disclosure relates to a fabricating procedure of a radio frequency device, in which a precursor wafer including active layers, SiGe layers, and a silicon handle substrate is firstly provided. Each active layer is formed from doped epitaxial silicon and underneath a corresponding SiGe layer. The silicon handle substrate is over each SiGe layer. Next, the silicon handle substrate is removed completely, and the SiGe layer is removed completely. An etch passivation film is then formed over each active layer. Herein, removing each SiGe layer and forming the etch passivation film over each active layer utilizes a same reactive chemistry combination, which reacts differently to the SiGe layer and the active layer. The reactive chemistry combination is capable of producing a variable performance, which is an etching performance of the SiGe layer or a forming performance of the etch passivation film over the active layer.
    Type: Application
    Filed: October 11, 2023
    Publication date: February 1, 2024
    Inventors: Krishna Chetry, Ganesan Radhakrishnan
  • Patent number: 11854865
    Abstract: The present disclosure relates to a fabricating procedure of a radio frequency device, in which a precursor wafer including active layers, SiGe layers, and a silicon handle substrate is firstly provided. Each active layer is formed from doped epitaxial silicon and underneath a corresponding SiGe layer. The silicon handle substrate is over each SiGe layer. Next, the silicon handle substrate is removed completely, and the SiGe layer is removed completely. An etch passivation film is then formed over each active layer. Herein, removing each SiGe layer and forming the etch passivation film over each active layer utilize a same reactive chemistry combination, which reacts differently to the SiGe layer and the active layer. The reactive chemistry combination is capable of producing a variable performance, which is an etching performance of the SiGe layer or a forming performance of the etch passivation film over the active layer.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: December 26, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Krishna Chetry, Ganesan Radhakrishnan
  • Publication number: 20230005756
    Abstract: A method of manufacturing a semiconductor device includes performing one or more grinding processes on a backside surface of a device wafer to thin the device wafer from a first thickness to a second thickness. A first chemical mechanical polish (CMP) process is performed on the backside surface of the device wafer to thin the device wafer from the second thickness to a third thickness. A second CMP process is performed on the backside surface of the device wafer to selectively remove device wafer material that is disposed over an active device area of the semiconductor device, where a removal rate of the device wafer material is a function of depth.
    Type: Application
    Filed: June 10, 2022
    Publication date: January 5, 2023
    Inventors: Krishna Chetry, Ganesan Radhakrishnan
  • Publication number: 20220285205
    Abstract: The present disclosure relates to a fabricating procedure of a radio frequency device, in which a precursor wafer including active layers, SiGe layers, and a silicon handle substrate is firstly provided. Each active layer is formed from doped epitaxial silicon and underneath a corresponding SiGe layer. The silicon handle substrate is over each SiGe layer. Next, the silicon handle substrate is removed completely, and the SiGe layer is removed completely. An etch passivation film is then formed over each active layer. Herein, removing each SiGe layer and forming the etch passivation film over each active layer utilize a same reactive chemistry combination, which reacts differently to the SiGe layer and the active layer. The reactive chemistry combination is capable of producing a variable performance, which is an etching performance of the SiGe layer or a forming performance of the etch passivation film over the active layer.
    Type: Application
    Filed: July 30, 2021
    Publication date: September 8, 2022
    Inventors: Krishna Chetry, Ganesan Radhakrishnan
  • Publication number: 20170357940
    Abstract: A method and system for dynamic inventory control of a warehouse is provided that includes, receiving consumption data for a product, standardizing the consumption data to provide a data record, at least one of populating or appending a data table with at least a portion of the data in the standardized data record, wherein the data table includes a plurality of time dependent data values, calculating a flow dynamics vector for the first time t using the data values in the data table, receiving the flow dynamics vector and generating a figurative state-space diagram that is divided into a plurality of zones by a plurality of threshold values related to the product, and evaluating the flow dynamics vector in the context of the thresholds to identify the zone indicated by the flow dynamics vector.
    Type: Application
    Filed: June 7, 2017
    Publication date: December 14, 2017
    Applicant: Customer Analytics, LLC
    Inventor: Ganesan Radhakrishnan
  • Patent number: 9229778
    Abstract: Various exemplary embodiments relate to a method and related network node including one or more of the following: determining first server dynamics associated with a first server instance, wherein the first server dynamics are indicative of a current performance of the first server instance; determining second server dynamics associated with a second server instance, wherein the second server dynamics are indicative of a current performance of the second server instance; determining, based on the first server dynamics, a current operating mode of the first server instance; determining, based on the second server dynamics, a current operating mode of the second server instance; scaling up with respect to the first server instance based on the first current operating mode indicating that the server instance is oversaturated; and scaling down with respect to the second server instance based on the second current operating mode indicating that the server instance is undersaturated.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: January 5, 2016
    Assignee: Alcatel Lucent
    Inventor: Ganesan Radhakrishnan
  • Publication number: 20130290499
    Abstract: Various exemplary embodiments relate to a method and related network node including one or more of the following: determining first server dynamics associated with a first server instance, wherein the first server dynamics are indicative of a current performance of the first server instance; determining second server dynamics associated with a second server instance, wherein the second server dynamics are indicative of a current performance of the second server instance; determining, based on the first server dynamics, a current operating mode of the first server instance; determining, based on the second server dynamics, a current operating mode of the second server instance; scaling up with respect to the first server instance based on the first current operating mode indicating that the server instance is oversaturated; and scaling down with respect to the second server instance based on the second current operating mode indicating that the server instance is undersaturated.
    Type: Application
    Filed: April 26, 2012
    Publication date: October 31, 2013
    Applicant: Alcatel-Lurent USA Inc.
    Inventor: Ganesan Radhakrishnan
  • Patent number: 5358891
    Abstract: A method of forming and refilling a trench in a substrate. First a trench is formed in the substrate. The trench is then refilled with a conformal material. Next, a recess is etched into the top portion of the refilled trench. The recess is then refilled with a second material until the refilled recess and substrate are substantially planar.
    Type: Grant
    Filed: June 29, 1993
    Date of Patent: October 25, 1994
    Assignee: Intel Corporation
    Inventors: Chi-Hwa Tsang, Kerry L. Spurgin, Deborah A. Parsons, William L. Hargrove, Ganesan Radhakrishnan