Patents by Inventor Ganesh A. Kumar

Ganesh A. Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interior plating and automated surface-deposition system
    Patent number: 10190229
    Abstract: A new system has a plurality of modular segments flexibly attached to one other and a source of electrical power and plating and coating solutions at the rear of the plurality of modular segments. The plurality of modular segments include a drive stage configured to push the plurality of modular segments along a surface, a plating stage configured to apply the plating solution to the surface under a pre-set operating current density to deposit metal or metal alloy onto the surface, a surface treatment application stage configured to apply the coating solution to the surface, and a curing stage configured to cure the coating solution to form a final coating on the surface that is resistant to corrosion, chemical attacks and chemical buildup.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: January 29, 2019
    Assignee: OCEANIT LABORATORIES, INC.
    Inventors: Glen Nakafuji, Ganesh Kumar Arumugam, Vinod Veedu, Matthew Nakatsuka
  • Cross Cloud Tenant Discovery
    Publication number: 20180359242
    Abstract: A computer-implemented method for a security endpoint of a non-isolated computing environment includes receiving a request related to a non-isolated application. The method includes querying a directory service according to a domain name of a user specified in the request. The directory service stores a mapping between domain names and computing environments, including isolated computing environments and the non-isolated computing environment. The method includes receiving, from the directory service, an indication of a first computing environment. The method includes generating and sending a response to allow the user to be authenticated to the application. In response to the first computing environment being the non-isolated computing environments, the response indicates that the user belongs to the non-isolated computing environment.
    Type: Application
    Filed: June 13, 2017
    Publication date: December 13, 2018
    Inventors: Madan Mohan R. APPIAH, Ganesh Kumar PANCHANATHAN, Maciej Jacek CUPIAL
  • Low overhead hierarchical connectivity of cache coherent agents to a coherent fabric
    Patent number: 10133670
    Abstract: In an example, a system-on-a-chip comprises a plurality of multi-core processors, such as four dual-core processors for eight total cores. Each of the processors connects to shared resources such as memory and peripherals via a shared uncore fabric. Because each input bus for each core can include hundreds of data lines, the number of lines into the shared uncore fabric can become prohibitive. Thus, inputs from each core are multiplexed, such as in a two-to-one configuration. The multiplexing may be a non-blocking, queued (such as FIFO) multiplexing to ensure that all packets from all cores are delivered to the uncore fabric. In certain embodiment, some smaller input lines may be provided to the uncore fabric non-multiplexed, and returns (outputs) from the uncore fabric to the cores may also be non-multiplexed.
    Type: Grant
    Filed: December 27, 2014
    Date of Patent: November 20, 2018
    Assignee: Intel Corporation
    Inventors: Ramadass Nagarajan, Jose S. Niell, Michael T. Klinglesmith, Derek T. Bachand, Ganesh Kumar
  • NATURAL LANGUAGE PROCESSING INTEGRATED WITH DATABASE AND DATA STORAGE MANAGEMENT
    Publication number: 20180329993
    Abstract: The disclosed technology can receive a voice query or text query in a natural language and translate it from natural language to a native database management language to respond to the query. For example, a human can ask his or her computer to “show large emails from December 2016”, and a data agent on computer can receive the voice request, convert audio associated with the voice to words in natural language, convert natural language into a SQL query, and convert the SQL query into a database management query. The data agent is trained with a corpus of technical documents and rules to determine the intent or keywords for answering the query. In some implementations, the disclosed technology can also include a chatbot and/or administrative assistant to enable a human to interface with a database management software using voice or text. In some implementations, the disclosed technology allows the user to automatically connect to a help desk technician to assist in completing the query.
    Type: Application
    Filed: May 10, 2018
    Publication date: November 15, 2018
    Inventors: Pavan Kumar Reddy Bedadala, Shilpa Nagendra, Rajesh Polimera, Aakash Chakravarthy Vijayakumar, Jie Chen, Neha Mathur, Vinay K. Pamarthi, Surya Prakash Ramachandran, Prasanna Kumar Thoppe Ravindran, Hari Prasad Ravula, Supreeth Sanur, Ganesh Kumar Subramanian, Priya Sundaresan, Jugpreet Singh Talwar
  • Process for the preparation of polymeric biosurfactants
    Patent number: 10106627
    Abstract: The present invention relates to polymeric biosurfactants isolated from two bacterial strains of Microbacterium sp. strain BS-2 [MTCC 5822] and Brevibacillus sp. strain BS-207 [MTCC 5823]. The present invention relates to an acidic exopolysaccharide (EPS), termed Microsan, with chemical composition of glucose, mannose and glucuronic acid (?-D-glucuronyl-(1-2)-D-mannosyl-(1-4)-D-glucose) produced by Microbacterium sp. strain BS-2 and a neutral EPS, termed Brevisan, of galactomannan with galactose and mannose residues in the ratio of 1:1 produced by Brevibacillus sp. strain BS-207. Both these polysaccharides exhibited surface-active and potential antibacterial, antioxidant, anti-inflammatory, and immunomodulatory activities.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: October 23, 2018
    Assignee: COUNCIL OF SCIENTIFIC & INDUSTRIAL RESEARCH
    Inventors: Chityal Ganesh Kumar, Sujitha Pombala
  • Method or Apparatus for Flexible Firmware Image Management in Microserver
    Publication number: 20180293202
    Abstract: Methods and systems are disclosed which may consolidate a flash management entity using IO virtualization. The consolidation may occur in a centralized location. Furthermore, a boot strap may be created to allow booting of the micro server from a virtualized firmware management entity.
    Type: Application
    Filed: June 11, 2018
    Publication date: October 11, 2018
    Applicant: Cisco Technology, Inc.
    Inventors: Ganesh A. Kumar, Yogindar Das Yasodhar
  • Third party account linking for voice user interface
    Patent number: 10089983
    Abstract: Methods and systems for adding functionality to an account of a language processing system where the functionality is associated with a second account of a first application system is described herein. In a non-limiting embodiment, an individual may log into a first account of a language processing system and log into a second account of a first application system. While logged into both the first account and the second account, a button included within a webpage provided by the first application may be invoked. A request capable of being serviced using the first functionality may be received by the language processing system from a device associated with the first account. The language processing system may send first account data and the second account data to the first application system to facilitate an action associated with the request, thereby enabling the first functionality for the first account.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: October 2, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Ganesh Kumar Gella, Venkata Abhinav Sidharth Bhagavatula, Robert William Serr, Yonnas Getahun Beyene
  • Processors having virtually clustered cores and cache slices
    Patent number: 10073779
    Abstract: A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is shared by the plurality of logical processors. The shared higher level cache includes a distributed cache slice for each of the logical processors. The processor includes logic to direct an access that misses in one or more lower level caches of a corresponding logical processor to a subset of the distributed cache slices in a virtual cluster that corresponds to the logical processor. Other processors, methods, and systems are also disclosed.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: September 11, 2018
    Assignee: Intel Corporation
    Inventors: Herbert H. Hum, Brinda Ganesh, James R. Vash, Ganesh Kumar, Leena K. Puthiyedath, Scott J. Erlanger, Eric J. Dehaemer, Adrian C. Moga, Michelle M. Sebot, Richard L. Carlson, David Bubien, Eric Delano
  • TRANSGENIC PLANTS WITH ENHANCED AGRONOMIC TRAITS
    Publication number: 20180237793
    Abstract: This invention provides transgenic plant cells with recombinant DNA for expression of proteins that are useful for imparting enhanced agronomic trait(s) to transgenic crop plants. This invention also provides transgenic plants and progeny seed comprising the transgenic plant cells where the plants are selected for having an enhanced trait selected from the group of traits consisting of enhanced water use efficiency, enhanced cold tolerance, increased yield, enhanced nitrogen use efficiency, enhanced seed protein and enhanced seed oil. Also disclosed are methods for manufacturing transgenic seed and plants with enhanced trait.
    Type: Application
    Filed: November 30, 2017
    Publication date: August 23, 2018
    Applicant: Monsanto Technology LLC
    Inventors: Eric D. Aasen, Mark Scott Abad, Edwards Allen, Thandoni Rao Ambika, Veena S. Anil, Alice Clara Augustine, Stephanie L. Back, Pranesh Badami, Amarjit Basra, Kraig L. Brustad, Molian Deng, Todd Dezwaan, Charles Dietrich, Stephen M. Duff, Karen K. Gabbert, Steve He, Bill L. Hendrix, Hongwu Jia, Vidya Kammaradi Ramanath Bhat, Balasulojini Karunanandaa, Kevin R. Kosola, Kempagangaiah Krishnamurthy, Ganesh Kumar, Saritha V. Kuriakose, Shantala Lakkanna, Mark E. Leibman, Linda Lutfiyya, Savitha Madappa, Sivalinganna Manjunath, Robert J. Meister, Bellur Narasimha Prasad, Sasha Preuss, Qungang Qi, Dhanalakshmi Ramachandra, Aniruddha Raychaudhuri, S. Sangeetha, Scott Saracco, Chitresh Sharma, Vijay K. Sharma, Monnanda S. Rajani, Padmini Sudarshana, Rebecca L. Thompson-Mize, Srikanth Venkatachalayya, Tyamagondlu V. Venkatesh, Huai Wang, Jingrui Wu, Xiaoyun Wu, Xiaofeng Sean Yang, Qin Zeng, Jianmin Zhao
  • System and method of template creation for a data extraction tool
    Patent number: 10049096
    Abstract: Methods and systems for template creation for a data extraction tool. A first template is selected from a plurality of documents provided by a user. An OCR engine annotates the first template and at least one data region in the first template corresponding to a set of parameters required in a target template is identified by selecting a geometrical region on the first template. At least one interim template is created based on the identification, and the plurality of documents are analyzed using the interim template to extract data values in the data region. The documents are converted to a format compliant with the target template based on the analysis.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: August 14, 2018
    Assignee: Infosys Limited
    Inventors: Krishnamurty Sai Deepak, Ganesh Kumar Nunnagoppula, Ann Matthew, Harikrishna G. N Rai, P. Radha Krishna, Rajesh Balakrishnan, Shreyas Bettadapura Guruprasad, Bintu G. Vasudevan
  • PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
    Publication number: 20180225213
    Abstract: A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is shared by the plurality of logical processors. The shared higher level cache includes a distributed cache slice for each of the logical processors. The processor includes logic to direct an access that misses in one or more lower level caches of a corresponding logical processor to a subset of the distributed cache slices in a virtual cluster that corresponds to the logical processor. Other processors, methods, and systems are also disclosed.
    Type: Application
    Filed: April 8, 2018
    Publication date: August 9, 2018
    Inventors: Herbert H. HUM, Brinda GANESH, James R. VASH, Ganesh KUMAR, Leena K. PUTHIYEDATH, Scott J. ERLANGER, Eric J. DEHAEMER, Adrian C. MOGA, Michelle M. SEBOT, Richard L. CARLSON, David BUBIEN, Eric DELANO
  • PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
    Publication number: 20180225212
    Abstract: A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is shared by the plurality of logical processors. The shared higher level cache includes a distributed cache slice for each of the logical processors. The processor includes logic to direct an access that misses in one or more lower level caches of a corresponding logical processor to a subset of the distributed cache slices in a virtual cluster that corresponds to the logical processor. Other processors, methods, and systems are also disclosed.
    Type: Application
    Filed: April 8, 2018
    Publication date: August 9, 2018
    Inventors: Herbert H. HUM, Brinda GANESH, James R. VASH, Ganesh KUMAR, Leena K. PUTHIYEDATH, Scott J. ERLANGER, Eric J. DEHAEMER, Adrian C. MOGA, Michelle M. SEBOT, Richard L. CARLSON, David BUBIEN, Eric DELANO
  • PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
    Publication number: 20180225211
    Abstract: A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is shared by the plurality of logical processors. The shared higher level cache includes a distributed cache slice for each of the logical processors. The processor includes logic to direct an access that misses in one or more lower level caches of a corresponding logical processor to a subset of the distributed cache slices in a virtual cluster that corresponds to the logical processor. Other processors, methods, and systems are also disclosed.
    Type: Application
    Filed: April 8, 2018
    Publication date: August 9, 2018
    Inventors: Herbert H. HUM, Brinda GANESH, James R. VASH, Ganesh KUMAR, Leena K. PUTHIYEDATH, Scott J. ERLANGER, Eric J. DEHAEMER, Adrian C. MOGA, Michelle M. SEBOT, Richard L. CARLSON, David Bubien, Eric Delano
  • Systems and methods for cell change based on target cell performance
    Patent number: 10039040
    Abstract: Systems and methods for a cell change based on target cell performance are disclosed. In some embodiments, a method of operation of a network node in a cellular communications network comprises receiving a measurement report from a wireless device having a serving cell, the measurement report comprising an indication that another cell is better than the serving cell such that the other cell is identified as a target cell for a cell change and the serving cell is identified as a source cell for the cell change. The method further comprises determining whether to perform the cell change from the source cell to the target cell based on one or more parameters indicative of a performance of the target cell. The method further comprises performing the cell change upon determining that the cell change from the source cell to the target cell should be performed.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: July 31, 2018
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Debasish Sarkar, Deepak Gupta, Ayan Sen, Ganesh Kumar
  • Method or apparatus for flexible firmware image management in microserver
    Patent number: 10013387
    Abstract: Methods and systems are disclosed which may consolidate a flash management entity using IO virtualization. The consolidation may occur in a centralized location. Furthermore, a boot strap may be created to allow booting of the micro server from a virtualized firmware management entity.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: July 3, 2018
    Assignee: Cisco Technology, Inc.
    Inventors: Ganesh A. Kumar, Yogindar Das Yasodhar
  • ELECTRICAL CONTACT ALLOY FOR VACUUM CONTACTORS
    Publication number: 20180166225
    Abstract: An improved electrical contact alloy, useful for example, in vacuum interrupters used in vacuum contactors is provided. The contact alloy according to the disclosed concept comprises copper particles and chromium particles present in a ratio of copper to chromium of 2:3 to 20:1. The electrical contact alloy also comprises particles of a carbide, which reduces the weld break strength of the electrical contact alloy without reducing its interruption performance.
    Type: Application
    Filed: December 13, 2016
    Publication date: June 14, 2018
    Applicant: EATON CORPORATON
    Inventors: LOUIS GRANT CAMPBELL, GANESH KUMAR BALASUBRAMANIAN, BENJAMIN ALEX ROSENKRANS
  • Portable intelligent controlling system for machines
    Patent number: 9971343
    Abstract: A portable plug-and-play intelligent system for monitoring and controlling process variations of a workpiece of a machine is provided. The portable plug-and-play intelligent system includes one or more sensors, a controller, a work piece, a plug & play modular fixture with a motor, a database, a comparison unit, and a control unit. The one or more sensors collect real-time data of the workpiece from the machine. The controller processes the real-time data collected from the one or more sensors. The database stores the processed real-time data. The comparison unit compares the real-time data of the workpiece with predefined specifications of the workpiece to check whether the real-time data is accurate or not. The control unit triggers the motor to allow the plug-and-play modular fixture to adjust the parameter variables of the machine to the predefined specifications of the workpiece when the real-time data is not accurate.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: May 15, 2018
    Inventors: Ganesh Kumar Nithyanandam, Radhakrishnan Pezhinkattil
  • Display of an electronic representation of a physical object in a virtual environment
    Patent number: 9965800
    Abstract: The technology may provide display of an electronic representation of physical art in a virtual environment so that a customer may visualize how the physical art would appear in a physical environment. Based on a characteristic of the physical art, a virtual environment in which to display an electronic representation of the physical art may be selected. The electronic representation of the physical art may then be included in the virtual environment for display to a customer. The customer may then electronically purchase the physical art via the virtual environment.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: May 8, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Christopher Pitstick, Daniel Paul Kirschner, Pratik Prakash Shah, Ganesh Kumar Gella, Gregory Paul Niejadlik, Sara Elisabeth Borowski, Jessica Lauren Fracassini, Jason Douglas Trichel
  • Hardware-based handling of missing interrupt propagation
    Patent number: 9940272
    Abstract: A circuit may receive an interrupt associated with a device. The interrupt may be sent by the device via an interrupt line associated with the device. The circuit may send the interrupt associated with the device. The interrupt may be sent via an interrupt line associated with the circuit. The circuit may start a missing interrupt timer, associated with the interrupt, based on sending the interrupt. The missing interrupt timer may be associated with a threshold amount of time by which the interrupt is to be serviced. The circuit may identify, based on the missing interrupt timer, the interrupt as a missing interrupt. The circuit may resend the missing interrupt via the interrupt line associated with the circuit. The missing interrupt may be resent to cause the missing interrupt to be serviced.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: April 10, 2018
    Assignee: Juniper Networks, Inc.
    Inventor: Ganesh Kumar Kuppa Subramanian
  • Apparatus for sleep information detection
    Patent number: D834200
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: November 20, 2018
    Assignee: ResMed Sensor Technologies Limited
    Inventors: Mathew Bates, Lukas Fuchs, Ganesh Kumar Sukumar, Buvenesh Balaji Ramachandran, Kieran Conway, Stephen McMahon, Dominic Southgate