Abstract: Embodiments include apparatuses, methods, and systems including a dynamic polarization controller (DPC) to receive a first light beam and a second light beam, to adjust a rotation of a state of polarization (SOP) of the first light beam and the second light beam to generate a third light beam and a fourth light beam, under the control of a first control signal, a second control signal, and a third control signal. The first control signal may be related to a phase difference between the third light beam and the fourth light beam, the second control signal may be related to an intensity difference between the third light beam and the fourth light beam, and the third control signal may be related to a rotation of a SOP of the third light beam and the fourth light beam. Other embodiments may also be described and claimed.

Abstract: An apparatus is provided, where the apparatus includes a plurality of components; a first circuitry to generate a clock signal, and to supply the clock signal to the plurality of components; a second circuitry to estimate, for each of two or more components of the plurality of components, a corresponding duty cycle of the clock signal received at the corresponding component, wherein two or more duty cycles corresponding to the two or more components are determined; a third circuitry to determine an average of the two or more duty cycles; and a fourth circuitry to correct a duty cycle of the clock signal generated by the first circuitry, based at least in part on the average.

Abstract: Embodiments herein relate to techniques for baseline wander (BLW) compensation. The technique may include identifying a data stream that is to be modulated by a ring modulator of an optical transmitter, wherein the data stream has a frequency operable to cause thermal-based BLW of an optical output of the optical transmitter. The technique may further include adjusting a time-varying direct current (DC) voltage bias of the ring modulator based on the frequency of the data stream. Other embodiments may be described and/or claimed.

Abstract: Embodiments include apparatuses, methods, and systems including a dynamic polarization controller (DPC) to receive a first light beam and a second light beam, to adjust a rotation of a state of polarization (SOP) of the first light beam and the second light beam to generate a third light beam and a fourth light beam, under the control of a first control signal, a second control signal, and a third control signal. The first control signal may be related to a phase difference between the third light beam and the fourth light beam, the second control signal may be related to an intensity difference between the third light beam and the fourth light beam, and the third control signal may be related to a rotation of a SOP of the third light beam and the fourth light beam. Other embodiments may also be described and claimed.

Abstract: An apparatus is provided, where the apparatus includes a plurality of components; a first circuitry to generate a clock signal, and to supply the clock signal to the plurality of components; a second circuitry to estimate, for each of two or more components of the plurality of components, a corresponding duty cycle of the clock signal received at the corresponding component, wherein two or more duty cycles corresponding to the two or more components are determined; a third circuitry to determine an average of the two or more duty cycles; and a fourth circuitry to correct a duty cycle of the clock signal generated by the first circuitry, based at least in part on the average.

Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for a photonic apparatus with a photodetector with bias control to provide substantially constant responsivity. The apparatus includes a first photodetector, to receive an optical input and provide a corresponding electrical output; a second photodetector coupled with the first photodetector, wherein the second photodetector is free from receipt of the optical input; and circuitry coupled with the first and second photodetectors, to generate a bias voltage, based at least in part on a dark current generated by the second photodetector in an absence of the optical input, and provide the generated bias voltage to the first photodetector. The first photodetector is to provide a substantially constant ratio of the electrical output to optical input in response to the provision of the generated bias voltage. Additional embodiments may be described and claimed.

Abstract: Embodiments include apparatuses, methods, and systems including a dynamic polarization controller (DPC) to receive a first light beam and a second light beam, to adjust a rotation of a state of polarization (SOP) of the first light beam and the second light beam to generate a third light beam and a fourth light beam, under the control of a first control signal, a second control signal, and a third control signal. The first control signal may be related to a phase difference between the third light beam and the fourth light beam, the second control signal may be related to an intensity difference between the third light beam and the fourth light beam, and the third control signal may be related to a rotation of a SOP of the third light beam and the fourth light beam. Other embodiments may also be described and claimed.

Abstract: Described is a reconfigurable transmitter which includes: a first pad; a second pad; a first single-ended driver coupled to the first pad; a second single-ended driver to the second pad; a differential driver coupled to the first and second pads; and a logic unit to enable of the first and second single-ended drivers, or to enable the differential driver.

Abstract: An apparatus is provided, where the apparatus includes a plurality of components; a first circuitry to generate a clock signal, and to supply the clock signal to the plurality of components; a second circuitry to estimate, for each of two or more components of the plurality of components, a corresponding duty cycle of the clock signal received at the corresponding component, wherein two or more duty cycles corresponding to the two or more components are determined; a third circuitry to determine an average of the two or more duty cycles; and a fourth circuitry to correct a duty cycle of the clock signal generated by the first circuitry, based at least in part on the average.

Abstract: The present disclosure is directed to photonic wavelength division multiplexing (WDM) receivers with polarization diversity and/or low reflectance. In embodiments, a WDM receiver is provided with a splitter, a plurality of waveguides and a plurality of photodetectors in series. The waveguides having particular equal path lengths relationship from the splitter to respective ones of the photodetectors. In other embodiments, the WDM receiver is provided with a splitter, a looped waveguide, a plurality of photodetectors, and a plurality of variable optical attenuators (VOAs). The VOAs are configured to suppress reflection of signal beams back to the transmitter. In various embodiments, the WDM receiver is a receiver sub-assembly of a silicon photonic transceiver disposed in a silicon package. Other embodiments may be described and/or claimed.

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to coherent optical receivers, including coherent receivers with integrated all-silicon waveguide photodetectors and tunable local oscillators implemented within CMOS technology. Embodiments are also directed to tunable silicon hybrid lasers with integrated temperature sensors to control wavelength. Embodiments are also directed to post-process phase correction of optical hybrid and nested I/Q modulators. Embodiments are also directed to demultiplexing photodetectors based on multiple microrings. In embodiments, all components may be implements on a silicon substrate. Other embodiments may be described and/or claimed.

Abstract: Disclosed herein are devices and methods to facilitate compensating for intra-pair skew in a high-definition multimedia interface (HDMI) system. One or more skew training pattern may be transmitted on a signal line including a differential pair. Acknowledgment of receiving the skew training pattern may be received on a display data channel (DDC) associated with HDMI system. The skew training pattern may be used to ascertain and compensate for intra-pair skew.

Abstract: Described is a reconfigurable transmitter which includes: a first pad; a second pad; a first single-ended driver coupled to the first pad; a second single-ended driver to the second pad; a differential driver coupled to the first and second pads; and a logic unit to enable of the first and second single-ended drivers, or to enable the differential driver.

Abstract: Disclosed herein are devices and methods to facilitate compensating for intra-pair skew in a high-definition multimedia interface (HDMI) system. One or more skew training pattern may be transmitted on a signal line including a differential pair. Acknowledgment of receiving the skew training pattern may be received on a display data channel (DDC) associated with HDMI system. The skew training pattern may be used to ascertain and compensate for intra-pair skew.

Abstract: Described is a reconfigurable transmitter which includes: a first pad; a second pad; a first single-ended driver coupled to the first pad; a second single-ended driver to the second pad; a differential driver coupled to the first and second pads; and a logic unit to enable of the first and second single-ended drivers, or to enable the differential driver.

Abstract: An apparatus is provided, where the apparatus includes a plurality of components; a first circuitry to generate a clock signal, and to supply the clock signal to the plurality of components; a second circuitry to estimate, for each of two or more components of the plurality of components, a corresponding duty cycle of the clock signal received at the corresponding component, wherein two or more duty cycles corresponding to the two or more components are determined; a third circuitry to determine an average of the two or more duty cycles; and a fourth circuitry to correct a duty cycle of the clock signal generated by the first circuitry, based at least in part on the average.

Abstract: Embodiments herein may relate to an optoelectronic receiver that includes a photonic integrated circuit (PIC) coupled with a light source. Respective PIC sections of the PIC may include a photodiode and a junction capacitor. The optoelectronic receiver may further include an electronic integrated circuit (EIC) coupled with the PIC. Respective EIC sections of the EIC may be communicatively coupled to respective ones of the PIC sections. Other embodiments may be described and/or claimed.

Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for a photonic apparatus with a photodetector with bias control to provide substantially constant responsivity. The apparatus includes a first photodetector, to receive an optical input and provide a corresponding electrical output; a second photodetector coupled with the first photodetector, wherein the second photodetector is free from receipt of the optical input; and circuitry coupled with the first and second photodetectors, to generate a bias voltage, based at least in part on a dark current generated by the second photodetector in an absence of the optical input, and provide the generated bias voltage to the first photodetector. The first photodetector is to provide a substantially constant ratio of the electrical output to optical input in response to the provision of the generated bias voltage. Additional embodiments may be described and claimed.

Abstract: An on-package interface. A first set of single-ended transmitter circuits on a first die. A first set of single-ended receiver circuits on a second die. The receiver circuits have a termination circuit comprising an inverter and a resistive feedback element. A plurality of conductive lines couple the first set of transmitter circuits and the first set of receiver circuits. The lengths of the plurality of conductive lines are matched.

Abstract: Embodiments include a resistor, coupled on a signal path, that includes one or more resistive memory elements, such as one or more magnetic tunnel junctions (MTJs). The resistance of the resistive memory elements may be digitally trimmable to adjust a resistance of the resistor on the signal path. The resistor may be incorporated into an analog or mixed signal circuit to pass an analog signal on the signal path. Other embodiments may be described and claimed.