Patents by Inventor Ganesh Dasika

Ganesh Dasika has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12019566
    Abstract: Arbitrating atomic memory operations, including: receiving, by a media controller, a plurality of atomic memory operations; determining, by an atomics controller associated with the media controller, based on one or more arbitration rules, an ordering for issuing the plurality of atomic memory operations; and issuing the plurality of atomic memory operations to a memory module according to the ordering.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: June 25, 2024
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Sergey Blagodurov, Johnathan Alsop, Jagadish B. Kotra, Marko Scrbak, Ganesh Dasika
  • Publication number: 20240119198
    Abstract: A physical system is simulated using a model including a plurality of elements in a mesh or grid. The elements are divided into partitions processed by different processing units. For some time steps, state data is transmitted between partitions and used to calculate flux data for updating the state of edge elements of the partitions. Periodically, transmission of state data is suppressed, and flux data is obtained by linear interpolation based on past flux data. Alternatively, flux data is obtained by processing state variables of an edge element and past flux data using a machine learning model, such as a DNN. Whether to suppress transmission of state data may be determined based on one or both of (a) uncertainty in an output of the machine learning model (e.g., Bayesian neural network) and (b) complexity of model of the physical system (e.g., spatial or temporal gradients).
    Type: Application
    Filed: September 30, 2022
    Publication date: April 11, 2024
    Inventors: Laurent S. White, Johnathan Alsop, Ganesh Dasika
  • Patent number: 11921784
    Abstract: An accelerator device includes a first processing unit to access a structure of a graph dataset, and a second processing unit coupled with the first processing unit to perform computations based on data values in the graph dataset.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: March 5, 2024
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ganesh Dasika, Michael Ignatowski, Michael J Schulte, Gabriel H Loh, Valentina Salapura, Angela Beth Dalton
  • Patent number: 11880312
    Abstract: A method includes storing a function representing a set of data elements stored in a backing memory and, in response to a first memory read request for a first data element of the set of data elements, calculating a function result representing the first data element based on the function.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: January 23, 2024
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kishore Punniyamurthy, SeyedMohammad SeyedzadehDelcheh, Sergey Blagodurov, Ganesh Dasika, Jagadish B Kotra
  • Patent number: 11868778
    Abstract: Compacted addressing for transaction layer packets, including: determining, for a first epoch, one or more low entropy address bits in a plurality of first transaction layer packets; removing, from one or more memory addresses of one or more second transaction layer packets, the one or more low entropy address bits; and sending the one or more second transaction layer packets.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: January 9, 2024
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Ganesh Dasika, Sergey Blagodurov, Seyedmohammad Seyedzadehdelcheh
  • Patent number: 11714652
    Abstract: A processing device includes a zero detection circuit to determine that an operand of a first instruction is zero and instruction conversion logic coupled with the zero detection circuit to, in response to the zero detection circuit determining that the operand is zero, convert the first instruction to a register move instruction executable by the processing device.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: August 1, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: John Kalamatianos, Ganesh Dasika
  • Publication number: 20230205837
    Abstract: A physical system is simulated using a model including a plurality of elements in a mesh or grid. The elements are divided into partitions processed by different processing units. For some time steps, flux data is transmitted between partitions for updating the state of edge elements of the partitions. Periodically, transmission of flux data is suppressed and flux data is obtained by linear interpolation based on past flux data. Alternatively, flux data is obtained by processing state variables of an edge element and past flux data using a machine learning model, such as a DNN.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Laurent S. White, Ganesh Dasika, Saketh Venkata Rama
  • Publication number: 20230186149
    Abstract: An approach is provided for using machine learning to provide compensation for roundoff error in algorithmic computations. The approach includes training a machine learning model based low precision data and corresponding high precision data. The low precision data includes pairs of low precision values of a specific datatype that correspond to pairs of high precision values from the high precision data. The high precision data includes pairs of high precision values of a specific datatype that correspond to the pairs of low precision values from the low precision data. When the machine learning model has been trained, the machine learning model is used as a basis for determining a compensation value is used to compensate for roundoff error in a particular algorithmic computation. Techniques discussed herein provide compensation for roundoff error during otherwise unstable computations, enabling high-performance computing and other scientific applications to use lower precision data types more readily.
    Type: Application
    Filed: December 14, 2021
    Publication date: June 15, 2023
    Inventors: Saketh Venkata Rama, Ganesh Dasika, Laurent S. White
  • Publication number: 20230169015
    Abstract: A method includes storing a function representing a set of data elements stored in a backing memory and, in response to a first memory read request for a first data element of the set of data elements, calculating a function result representing the first data element based on the function.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 1, 2023
    Inventors: Kishore Punniyamurthy, SeyedMohammad SeyedzadehDelcheh, Sergey Blagodurov, Ganesh Dasika, Jagadish B. Kotra
  • Publication number: 20230024089
    Abstract: A processing device includes a zero detection circuit to determine that an operand of a first instruction is zero and instruction conversion logic coupled with the zero detection circuit to, in response to the zero detection circuit determining that the operand is zero, convert the first instruction to a register move instruction executable by the processing device.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 26, 2023
    Inventors: John Kalamatianos, Ganesh Dasika
  • Publication number: 20220365975
    Abstract: An accelerator device includes a first processing unit to access a structure of a graph dataset, and a second processing unit coupled with the first processing unit to perform computations based on data values in the graph dataset.
    Type: Application
    Filed: December 29, 2021
    Publication date: November 17, 2022
    Inventors: Ganesh Dasika, Michael Ignatowski, Michael J. Schulte, Gabriel H. Loh, Valentina Salapura, Angela Beth Dalton
  • Publication number: 20220365725
    Abstract: A method includes receiving from a compute element a command for performing a requested operation on data stored in a memory device, and in response to receiving the command, performing the requested operation by generating a plurality of memory access requests based on the command and issuing the plurality of memory access requests to the memory device.
    Type: Application
    Filed: May 10, 2022
    Publication date: November 17, 2022
    Inventors: Michael Ignatowski, Valentina Salapura, Ganesh Dasika, Gabriel H Loh
  • Patent number: 11321604
    Abstract: Subject matter disclosed herein may relate to storage and/or processing of signals and/or states representative of neural network parameters in a computing device, and may relate more particularly to compressing signals and/or states representative of neural network nodes in a computing device.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: May 3, 2022
    Assignees: ARM Ltd., The Regents of the University of Michigan
    Inventors: Jiecao Yu, Andrew Lukefahr, David Palframan, Ganesh Dasika, Reetuparnda Das, Scott Mahlke
  • Patent number: 11275996
    Abstract: Subject matter disclosed herein may relate to storage of signals and/or states representative of parameters in a computing device, and may relate more particularly to storage of signals and/or states representative of neural network parameters in a computing device.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: March 15, 2022
    Assignees: ARM Ltd., The Regents of the University of Michigan
    Inventors: Jiecao Yu, Andrew Lukefahr, David Palframan, Ganesh Dasika, Reetuparnda Das, Scott Mahlke
  • Publication number: 20220027158
    Abstract: Compacted addressing for transaction layer packets, including: determining, for a first epoch, one or more low entropy address bits in a plurality of first transaction layer packets; removing, from one or more memory addresses of one or more second transaction layer packets, the one or more low entropy address bits; and sending the one or more second transaction layer packets.
    Type: Application
    Filed: July 23, 2020
    Publication date: January 27, 2022
    Inventors: GANESH DASIKA, SERGEY BLAGODUROV, SEYEDMOHAMMAD SEYEDZADEHDELCHEH
  • Publication number: 20220027291
    Abstract: Arbitrating atomic memory operations, including: receiving, by a media controller, a plurality of atomic memory operations; determining, by an atomics controller associated with the media controller, based on one or more arbitration rules, an ordering for issuing the plurality of atomic memory operations; and issuing the plurality of atomic memory operations to a memory module according to the ordering.
    Type: Application
    Filed: July 24, 2020
    Publication date: January 27, 2022
    Inventors: SERGEY BLAGODUROV, JOHNATHAN ALSOP, JAGADISH B. KOTRA, MARKO SCRBAK, GANESH DASIKA
  • Publication number: 20180373978
    Abstract: Subject matter disclosed herein may relate to storage of signals and/or states representative of parameters in a computing device, and may relate more particularly to storage of signals and/or states representative of neural network parameters in a computing device.
    Type: Application
    Filed: June 21, 2017
    Publication date: December 27, 2018
    Inventors: Jiecao Yu, Andrew Lukefahr, David Palframan, Ganesh Dasika, Reetuparnda Das, Scott Mahlke
  • Publication number: 20180373975
    Abstract: Subject matter disclosed herein may relate to storage and/or processing of signals and/or states representative of neural network parameters in a computing device, and may relate more particularly to compressing signals and/or states representative of neural network nodes in a computing device.
    Type: Application
    Filed: June 21, 2017
    Publication date: December 27, 2018
    Inventors: Jiecao Yu, Andrew Lukefahr, David Palframan, Ganesh Dasika, Reetuparnda Das, Scott Mahlke
  • Publication number: 20080077824
    Abstract: There is disclosed data storage control circuitry for controlling storage and retrieval of data in a data store in which data is stored in data blocks, each of said data blocks comprising a plurality of bits, said data store comprising at least one faulty bit within at least some of said data blocks.
    Type: Application
    Filed: July 2, 2007
    Publication date: March 27, 2008
    Inventors: Trevor Mudge, Ganesh Dasika, David Roberts