Patents by Inventor Gang Won Lee

Gang Won Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961445
    Abstract: A data processing circuit according to an embodiment may include a reception circuit configured to receive image data including grayscale values associated with pixels disposed in a display panel. The data processing circuit may include a compensation circuit configured to calculate a final compensation value by multiplying a representative compensation value of each area and a global gain, and to produce converted image data. The data processing circuit may include a memory storing a representative compensation value associated with a grayscale value of each area of the display panel, and may include a transmission circuit configured to transmit the converted image data to a data driving circuit.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: April 16, 2024
    Assignee: LX SEMICON CO., LTD.
    Inventors: Jun Young Park, Do Yeon Kim, Min Ji Lee, Gang Won Lee, Young Kyun Kim, Ji Won Lee
  • Publication number: 20240114507
    Abstract: A user equipment (UE) configured for operation in a fifth-generation new radio (5G NR) system may be configured for multi physical downlink shared channel (PDSCH) scheduling and may decode a first downlink control information (DCI) and a second DCI received from a gNodeB (gNB). The first DCI may schedule multiple PDSCHs and the second DCI may schedule one or more PDSCHs. The UE may check the timing relations of the scheduled PDSCHs for validity when the first DCI and the second DCI end at a same symbol. When the multiple PDSCHs scheduled by the first DCI and the one or more PDSCHs scheduled by the second DCI are determined to have overlapping time spans, the UE may identify all the PDSCHs scheduled by the first DCI the second DCI as invalid.
    Type: Application
    Filed: May 10, 2022
    Publication date: April 4, 2024
    Inventors: Yingyang Li, Debdeep Chatterjee, Dae Won Lee, Yi Wang, Gang Xiong
  • Patent number: 11950267
    Abstract: The disclosure provides mechanisms for transmission of multiple DCIs. An apparatus for an AN includes RF interface circuitry; and processing circuitry coupled with the interface circuitry and configured to: multiplex one or more PDCCHs carrying DCI for a UE in a TDM manner; perform a resource mapping to map the multiplexed one or more PDCCHs into frequency and time resources in a CORESET; and provide the multiplexed one or more PDCCHs to the RF interface circuitry for transmission to the UE with the frequency and time resources in the CORESET.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: April 2, 2024
    Assignee: Intel Corporation
    Inventors: Dae Won Lee, Yingyang Li, Gang Xiong
  • Patent number: 11936583
    Abstract: Devices, systems and methods for a fifth generation (5G) or new radio (NR) system comprising multiplexing, by a gNodeB (gNB), a physical broadcast channel (PBCH) and an associated demodulation reference signal (DMRS) in a time division multiplexing (TDM) manner; and transmitting, by the gNB, the PBCH by employing a Discrete Fourier Transform-spread-orthogonal frequency-division multiplexing (DFT-s-OFDM) waveform and its associated DMRS.
    Type: Grant
    Filed: March 24, 2023
    Date of Patent: March 19, 2024
    Assignee: Apple Inc.
    Inventors: Gang Xiong, Dae Won Lee, Gregory Morozov, Yushu Zhang, Jie Zhu
  • Patent number: 11930465
    Abstract: An apparatus of a user equipment (UE) includes processing circuitry, where to configure the UE for New Radio (NR) communications above a 52.6 GHz carrier frequency, the processing circuitry is to decode higher layer signaling, the higher layer signaling including a default slot duration for a transmission of control signaling. The control signaling includes a synchronization signal (SS) and a physical broadcast channel (PBCH) signaling. Synchronization information within a SS block is decoded. The SS block is received within a SS burst set and occupying a plurality of symbols within a slot having the default slot duration. A synchronization procedure is performed with a next generation Node-B (gNB) based on the synchronization information within the SS block and the PBCH signaling.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: March 12, 2024
    Assignee: Intel Corporation
    Inventors: Gang Xiong, Avik Sengupta, Yushu Zhang, Jie Zhu, Dae Won Lee, Alexei Vladimirovich Davydov, Gregory Vladimirovich Morozov
  • Publication number: 20240071278
    Abstract: A display apparatus having a mura compensation function includes a mura memory in which compensation data corresponding to coefficient values of a mura compensation equation is stored; and a mura compensation circuit configured to perform mura compensations on display data by using the mura compensation equation to which the compensation data has been applied, wherein the coefficient values are set so that the mura compensation equation has been fit to have a curve that satisfies known difference values of selected gray levels, a first estimation difference value of a first estimation gray level higher than the selected gray levels, and a second estimation difference value of a second estimation gray level lower than the selected gray levels, and wherein the compensation data comprises the coefficient values of the mura compensation equation in which all of the known difference values of the selected gray levels, the first estimation difference value, and the second estimation difference value have a differen
    Type: Application
    Filed: October 25, 2023
    Publication date: February 29, 2024
    Applicant: LX SEMICON CO., LTD.
    Inventors: Jun Young PARK, Min Ji LEE, Gang Won LEE, Young Kyun KIM, Ji Won LEE, Jung Hyun KIM, Suk Ju KANG, Sung In CHO
  • Publication number: 20240073942
    Abstract: Described is an apparatus of a User Equipment (UE) operable to communicate with a fifth-generation Evolved Node-B (gNB) on a wireless network. The apparatus may comprise a first circuitry and a second circuitry. The first circuitry may be operable to process a message comprising an indicator to indicate a number of contention based physical random access channel (PRACH) preambles within a PRACH occasion per Synchronization Signal Block (SSB). The second circuitry may be operable to generate a first PRACH occasion, based on the indicator.
    Type: Application
    Filed: September 22, 2023
    Publication date: February 29, 2024
    Applicant: Apple Inc.
    Inventors: Alexei DAVYDOV, Seunghee HAN, Gang XIONG, Gregory V. MOROZOV, Yushu ZHANG, Joonyoung CHO, Dae Won LEE, Yongjun KWAK
  • Publication number: 20230395011
    Abstract: A voltage drop compensation system and a display driving device for compensating for a voltage drop of a display panel. The voltage drop compensation system generates a voltage drop compensation value for each of a plurality of regions into which a test image of a panel is divided, and the display driving device compensates for a voltage drop for each region of image data using the voltage drop compensation value.
    Type: Application
    Filed: August 23, 2023
    Publication date: December 7, 2023
    Applicant: LX Semicon Co., Ltd.
    Inventors: Jun Young PARK, Min Ji LEE, Gang Won LEE, Young Kyun KIM, Ju Hyoung LIM, Ji Won LEE
  • Patent number: 11837141
    Abstract: The present disclosure discloses a display driving apparatus having a mura compensation function and a method of compensating for mura of the same. To this end, the display driving apparatus may include a mura memory in which compensation data corresponding to coefficient values of a mura compensation equation is stored, and a mura compensation circuit configured to perform mura compensations on display data by using the mura compensation equation to which the compensation data has been applied.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: December 5, 2023
    Assignee: LX SEMICON CO., LTD.
    Inventors: Jun Young Park, Min Ji Lee, Gang Won Lee, Young Kyun Kim, Ji Won Lee, Jung Hyun Kim, Suk Ju Kang, Sung In Cho
  • Patent number: 11776451
    Abstract: A voltage drop compensation system and a display driving device for compensating for a voltage drop of a display panel. The voltage drop compensation system generates a voltage drop compensation value for each of a plurality of regions into which a test image of a panel is divided, and the display driving device compensates for a voltage drop for each region of image data using the voltage drop compensation value.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: October 3, 2023
    Assignee: LX SEMICON CO., LTD.
    Inventors: Jun Young Park, Min Ji Lee, Gang Won Lee, Young Kyun Kim, Ju Hyoung Lim, Ji Won Lee
  • Patent number: 11663951
    Abstract: Provided is a technology for resolving a mura phenomenon in a display panel to which gamma is applied, in which demura compensation values are generated in a log domain to improve a problem of nonlinearity due to gamma.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: May 30, 2023
    Assignee: LX SEMICON CO., LTD.
    Inventors: Jun Young Park, Do Yeon Kim, Min Ji Lee, Gang Won Lee, Young Kyun Kim, Ji Won Lee
  • Publication number: 20230118591
    Abstract: The present disclosure discloses a display driving apparatus having a mura compensation function and a method of compensating for mura of the same. To this end, the display driving apparatus may include a mura memory in which compensation data corresponding to coefficient values of a mura compensation equation is stored, and a mura compensation circuit configured to perform mura compensations on display data by using the mura compensation equation to which the compensation data has been applied.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 20, 2023
    Applicant: LX Semicon Co., Ltd.
    Inventors: Jun Young PARK, Min Ji LEE, Gang Won LEE, Young Kyun KIM, Ji Won LEE, Jung Hyun KIM, Suk Ju KANG, Sung In CHO
  • Publication number: 20230073179
    Abstract: The present disclosure discloses an apparatus and method for providing compensation information, which compress the compensation information for demura and a display driving apparatus for solving a defect in a screen by using compressed compensation information. The apparatus for providing compensation information includes a compensation value provision unit configured to provide compensation values of pixels and a compression unit configured to perform compression on the compensation values for each block of a screen.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 9, 2023
    Applicant: LX Semicon Co., Ltd.
    Inventors: Jun Young PARK, Min Ji LEE, Gang Won LEE, Young Kyun KIM, Ji Won LEE, Suk Ju KANG, Joo Sung CHOI
  • Publication number: 20220415240
    Abstract: A voltage drop compensation system and a display driving device for compensating for a voltage drop of a display panel. The voltage drop compensation system generates a voltage drop compensation value for each of a plurality of regions into which a test image of a panel is divided, and the display driving device compensates for a voltage drop for each region of image data using the voltage drop compensation value.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 29, 2022
    Applicant: LX Semicon Co., Ltd.
    Inventors: Jun Young PARK, Min Ji LEE, Gang Won LEE, Young Kyun KIM, Ju Hyoung LIM, Ji Won LEE
  • Patent number: 11398176
    Abstract: A Mura compensation data generation apparatus for compensating for Mura, and a Mura compensation apparatus of a display using Mura compensation data. The Mura compensation data generation apparatus includes an image representative value generation circuit configured to generate a representative value representing an entire gray of an image; a difference value extraction circuit configured to extract difference values between the representative value and gray values for a plurality of preset positions on the image; a distribution range determination circuit configured to determine a distribution range of the difference values by checking a maximum value and a minimum value of the difference values; and a Mura compensation data generation circuit configured to generate Mura compensation data having a preset number of bits corresponding to the difference values.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: July 26, 2022
    Assignee: LX Semicon Co., Ltd.
    Inventors: Do Yeon Kim, Jun Young Park, Min Ji Lee, Gang Won Lee, Young Kyun Kim, Ji Won Lee
  • Publication number: 20220180788
    Abstract: A Mura compensation data generation apparatus for compensating for Mura, and a Mura compensation apparatus of a display using Mura compensation data. The Mura compensation data generation apparatus includes an image representative value generation circuit configured to generate a representative value representing an entire gray of an image; a difference value extraction circuit configured to extract difference values between the representative value and gray values for a plurality of preset positions on the image; a distribution range determination circuit configured to determine a distribution range of the difference values by checking a maximum value and a minimum value of the difference values; and a Mura compensation data generation circuit configured to generate Mura compensation data having a preset number of bits corresponding to the difference values.
    Type: Application
    Filed: December 7, 2021
    Publication date: June 9, 2022
    Applicant: LX Semicon Co., Ltd.
    Inventors: Do Yeon KIM, Jun Young PARK, Min Ji LEE, Gang Won LEE, Young Kyun KIM, Ji Won LEE
  • Publication number: 20220172664
    Abstract: A data processing circuit according to an embodiment may include a reception circuit configured to receive image data including grayscale values associated with pixels disposed in a display panel. The data processing circuit may include a compensation circuit configured to calculate a final compensation value by multiplying a representative compensation value of each area and a global gain, and to produce converted image data. The data processing circuit may include a memory storing a representative compensation value associated with a grayscale value of each area of the display panel, and may include a transmission circuit configured to transmit the converted image data to a data driving circuit.
    Type: Application
    Filed: November 29, 2021
    Publication date: June 2, 2022
    Inventors: Jun Young Park, Do Yeon Kim, Min Ji Lee, Gang Won Lee, Young Kyun Kim, Ji Won Lee
  • Publication number: 20220165201
    Abstract: Provided is a technology for resolving a mura phenomenon in a display panel to which gamma is applied, in which demura compensation values are generated in a log domain to improve a problem of nonlinearity due to gamma
    Type: Application
    Filed: November 19, 2021
    Publication date: May 26, 2022
    Inventors: Jun Young Park, Do Yeon Kim, Min Ji Lee, Gang Won Lee, Young Kyun Kim, Ji Won Lee