Patents by Inventor Gangadhara Swami Mathad

Gangadhara Swami Mathad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6821900
    Abstract: A method for etching trenches in a substrate secures a wafer to an electrode in a plasma chamber and heats the wafer to a temperature of greater than 200 degrees Celsius. The wafer is exposed to a reactive plasma to etch trenches into the substrate of the wafer with minimal redeposition of etch by-products to avoid pinching off the trench and to promote further etching.
    Type: Grant
    Filed: January 9, 2001
    Date of Patent: November 23, 2004
    Assignees: Infineon Technologies AG, International Business Machines
    Inventors: Satish Athavale, Rajiv Ranade, Munir Naeem, Gangadhara Swami Mathad
  • Publication number: 20020094690
    Abstract: A method for etching trenches in a substrate secures a wafer to an electrode in a plasma chamber and heats the wafer to a temperature of greater than 200 degrees Celsius. The wafer is exposed to a reactive plasma to etch trenches into the substrate of the wafer with minimal redeposition of etch by-products to avoid pinching off the trench and to promote further etching.
    Type: Application
    Filed: January 9, 2001
    Publication date: July 18, 2002
    Inventors: Satish Athavale, Rajive Ranade, Munir Naeem, Gangadhara Swami Mathad
  • Patent number: 6224690
    Abstract: An interconnection structure suitable for the connection of microelectronic circuit chips to packages is provided by this invention. In particular, the invention pertains to the area-array or flip-chip technology often called C4 (controlled collapse chip connection). The structure comprises an adhesion/barrier layer deposited on a passivated substrate (e.g., a silicon wafer), optionally an additional adhesion layer, a solderable layer of a metal selected from the group consisting of Ni, Co, Fe, NiFe, NiCo, CoFe and NiCoFe on the adhesion/barrier layer, and a lead-free solder ball comprising tin as the predominate component and one or more alloying elements selected from Bi, Ag, and Sb, and further optionally including one or more elements selected from the group consisting of Zn, In, Ni, Co and Cu.
    Type: Grant
    Filed: March 12, 1996
    Date of Patent: May 1, 2001
    Assignee: International Business Machines Corporation
    Inventors: Panayotis Constantinou Andricacos, Madhav Datta, Hariklia Deligianni, Wilma Jean Horkans, Sung Kwon Kang, Keith Thomas Kwietniak, Gangadhara Swami Mathad, Sampath Purushothaman, Leathen Shi, Ho-Ming Tong
  • Patent number: 5759437
    Abstract: A chemical etchant for the removal of titanium-tungsten containing structures from the semiconductors and a method for removing the titanium-tungsten. The etchant comprising a solution of hydrogen peroxide, a salt of EDTA, and an acid, the acid capable of preventing the deposition of tin oxide. The method of removal comprises first obtaining a wafer containing titanium-tungsten. Second, immersing the wafer having titanium-tungsten thereon for a predetermined period of time in an etchant bath comprising a solution of hydrogen peroxide, a salt of EDTA and an acid, the acid capable of preventing the deposition of tin oxide. Third, removing the treated wafer and rinsing the treated wafer and lastly, drying the wafer.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: June 2, 1998
    Assignee: International Business Machines Corporation
    Inventors: Madhav Datta, Thomas Safron Kanarsky, Gangadhara Swami Mathad, Ravindra V. Shenoy