Patents by Inventor Gao Lin

Gao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140284958
    Abstract: A sun visor system includes multiple visors to provide selective window coverage for glare. This system can be employed on the driver side, passenger side, or both. The second visor (50), having pivotal device (56) on support rod (54), can be easily connected to the first visor (20) support rod (24) to provide pivotal movements between the windshield and side window. These visors, first and second, can be moved together or separately to stored positions, windshield and side window blocked positions, or combinations of both positions to provide window protection from glare quickly and easily for windshield, side window, or both. Also support rod of the visor can be made of flexible material, like gooseneck arm, to further provide flexible adjustments of visor to desired positions to block glare from different angles or positions of vehicle window. This adjustable visor system can be applied to a single sun visor system or multiple visors system.
    Type: Application
    Filed: March 22, 2013
    Publication date: September 25, 2014
    Inventors: Der-Gao Lin, Wonchon Lin, Won-Yi Lin, Liao Yu-Hua Lin
  • Publication number: 20100267390
    Abstract: The invention provides a method and system for fault-tolerant communication. It utilizes three wide area networks, including the cell phone network, the internet and the telephone network (PSTN). The method and system monitors the wide-area networks and sends warning messages if they cannot be accessed from a local site. Primary failure conditions relate to the access and use of the three wide-area networks. Secondary failure conditions include power outages. The possible fault conditions include: ‘telephone out’, ‘internet out’, ‘wireless radio out’, ‘power out’. If these failure conditions are detected, the method and system alerts the user and redirects voice, text message, and data traffic via a detour over a different wide-area network in order to avoid that failure. A method and system has been disclosed that routs information over one of multiple networks in a fault-tolerant manner.
    Type: Application
    Filed: September 4, 2008
    Publication date: October 21, 2010
    Inventors: Gao Lin, Lan Tao Chen, Rainer Von Konigslow
  • Patent number: 6911360
    Abstract: An active fuse includes an active fuse geometry (120) that is used to form both a variable resistor (106) and a select transistor (110). In one embodiment, the active fuse geometry is formed in a portion of an active region (160) of a semiconductor substrate (140), and a select gate (124) is disposed over an end portion (123) of the active fuse geometry to form an integral select transistor (110) for use in programming the active fuse. The use of a shared active fuse geometry within the active region allows for reduced area requirements and improved sensing margins.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: June 28, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Chi Nan Brian Li, Alexander B. Hoefler, Der-Gao Lin
  • Publication number: 20040217439
    Abstract: An active fuse includes an active fuse geometry (120) that is used to form both a variable resistor (106) and a select transistor (110). In one embodiment, the active fuse geometry is formed in a portion of an active region (160) of a semiconductor substrate (140), and a select gate (124) is disposed over an end portion (123) of the active fuse geometry to form an integral select transistor (110) for use in programming the active fuse. The use of a shared active fuse geometry within the active region allows for reduced area requirements and improved sensing margins.
    Type: Application
    Filed: April 29, 2003
    Publication date: November 4, 2004
    Inventors: Chi Nan Brian Li, Alexander B. Hoefler, Der-Gao Lin
  • Patent number: 5985731
    Abstract: A method of forming a stacked capacitor structure in a semiconductor device, having metal electrode plates. After depositing the bottom electrode layer (26) and the dielectric layer (28) of the capacitor, a rough patterning step is carried out to roughly pattern or shape the bottom electrode layer and the dielectric layer, and to expose the underlying interlayer dielectric (18). A top electrode layer (32) is then blanket deposited, and another, more precise etching step is carried out to form the final shape of the capacitor element, while leaving behind a portion of the top electrode layer on the interlayer dielectric, which forms a metal interconnect (36). In one embodiment, the electrode layers are comprised of materials having a conductivity greater than doped silicon (either poly or monocrystalline), such as a metal.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: November 16, 1999
    Assignee: Motorola, Inc.
    Inventors: Kenneth Chia-Kun Weng, Christopher Sterling Lohn, Der-Gao Lin, Kevin Yun-Kang Wu, Jeffrey D. Ganger
  • Patent number: D724770
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: March 17, 2015
    Assignee: Eagle Technology Co., Ltd
    Inventor: Gao Lin
  • Patent number: D738013
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: September 1, 2015
    Assignee: EAGLE TECHNOLOGY CO., LTD.
    Inventor: Gao Lin