Patents by Inventor Gaoming Du

Gaoming Du has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11379554
    Abstract: The present application discloses a verification system and method for an operation result based on a reconfigurable butterfly unit. The system is applicable to a digital signal processing (DSP) chip. The DSP chip includes a reconfigurable butterfly unit. The reconfigurable butterfly unit may be reconfigured into two modes: a first verification mode and a second verification mode. The system includes: a controller, a memory, a verification unit, a first data gating unit, and a second data gating unit. The technical solution in the present application is used to overcome the disadvantage that an existing verification system and an existing verification method consume large hardware resources, thereby reducing the implementation costs of operation result verification.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: July 5, 2022
    Assignee: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Yukun Song, Zhengmao Wang, Duoli Zhang, Xu Tang, Zhenmin Li, Gaoming Du
  • Patent number: 11194887
    Abstract: The application discloses a data processing device, a data processing method and a digital signal processing device. The data processing device is used to reduce computing amount by reading and writing operation of memory. The data processing device comprises: a module for calculating reduced coefficient matrices, a storage module, a module for modifying reduced coefficient matrices, a module for triangular inversing, a module for obtaining inversion matrices and a module for correcting reverse result.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: December 7, 2021
    Assignee: HEFEI UNIVERSITY OF TECHNOLOGY
    Inventors: Duoli Zhang, Ziyan Ye, Qi Sun, Yukun Song, Gaoming Du
  • Publication number: 20210334333
    Abstract: The present application discloses a verification system and method for an operation result based on a reconfigurable butterfly unit. The system is applicable to a digital signal processing (DSP) chip. The DSP chip includes a reconfigurable butterfly unit. The reconfigurable butterfly unit may be reconfigured into two modes: a first verification mode and a second verification mode. The system includes: a controller, a memory, a verification unit, a first data gating unit, and a second data gating unit. The technical solution in the present application is used to overcome the disadvantage that an existing verification system and an existing verification method consume large hardware resources, thereby reducing the implementation costs of operation result verification.
    Type: Application
    Filed: February 10, 2021
    Publication date: October 28, 2021
    Applicant: HeFei University of Technology
    Inventors: Yukun Song, Zhengmao Wang, Duoli Zhang, Xu Tang, Zhenmin Li, Gaoming Du
  • Publication number: 20200012704
    Abstract: The application discloses a data processing device, a data processing method and a digital signal processing device. The data processing device is used to reduce computing amount by reading and writing operation of memory. The data processing device comprises: a module for calculating reduced coefficient matrices, a storage module, a module for modifying reduced coefficient matrices, a module for triangular inversing, a module for obtaining inversion matrices and a module for correcting reverse result.
    Type: Application
    Filed: July 3, 2019
    Publication date: January 9, 2020
    Applicant: HeFei University of Technology
    Inventors: Duoli Zhang, Ziyan Ye, Qi Sun, Yukun Song, Gaoming Du