Patents by Inventor Gareth David Edwards

Gareth David Edwards has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250007684
    Abstract: A computer-implemented method for managing channel accessibility can include detecting, by a first circuit, a transmit request from the first circuit to transmit a message into a communication channel connecting the first circuit to second circuit. The method can include determining, by the first circuit, whether to approve the transmit request based on an evaluation of a first number associated with messages previously transmitted by the first circuit to the second circuit over the communication channel and a second number associated with processing by the second circuit of the messages previously transmitted by the first circuit. The method can include, in response to determining to approve the transmit request, transmitting, by the first circuit, the message into the communication channel. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Application
    Filed: June 30, 2023
    Publication date: January 2, 2025
    Applicant: Xilinx, Inc.
    Inventors: Mark Richard Nethercot, Martin Rhodes, David Riddoch, Connor Hughes, Gareth David Edwards
  • Publication number: 20250004941
    Abstract: A computer-implemented method for memory management can include identifying a set of one or more memory blocks of virtual memory to be allocated for storage of a content into a plurality of memory banks that subdivide physical memory. The method can include storing the content in the set of one or more memory blocks of virtual memory. The method can include assigning an identifier to the set of one or more memory blocks of virtual memory that store the content. The method can include outputting the identifier for the set of one or more memory blocks of virtual memory. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Application
    Filed: June 30, 2023
    Publication date: January 2, 2025
    Applicant: Xilinx, Inc.
    Inventors: Duncan Andrew Cockburn, David James Fraser, Inaki Ormaetxea, Gareth David Edwards, Dmitri Kitariev, David Riddoch, Victor Wu
  • Patent number: 7594048
    Abstract: Measuring transit time across an asynchronous first-in-first-out (FIFO) memory can include sampling an indication of a value of a read pointer of the FIFO memory at a sampling frequency that exceeds a frequency of a read clock and a write clock of the FIFO memory. An indication of a value of a write pointer of the FIFO memory can be sampled at the sampling frequency. For each sampling period, a measure of occupancy of the FIFO memory can be calculated according to a sampled pair including the indication of the value of the read pointer and the indication of the value of the write pointer. The measure of occupancy can be averaged over a predetermined number of cycles of the sampling frequency. The averaged measure of occupancy can be output as an indication of transit time across the FIFO memory.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: September 22, 2009
    Assignee: Xilinx, Inc.
    Inventors: Gareth David Edwards, David Finlay Taylor, Duncan Andrew Cockburn, Douglas Michael Grant, Stuart Alan Nisbet