Patents by Inventor Garo Tanielian

Garo Tanielian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8164154
    Abstract: A low profile high power Schottky barrier bypass diode for solar cells and panels with the cathode and anode electrodes on the same side of the diode and a method of fabrication thereof are disclosed for generating a thin chip with both electrodes being on the same side of the chip. In an embodiment, a mesa isolation with a Zener diode over the annular region surrounding the central region of the mesa anode in the Epi of the substrate is formed. In an embodiment, a P-type Boron dopant layer is ion implanted in the annular region for the Zener Diode. This controls recovery from high voltage spikes from the diode rated voltage. A Schottky barrier contact for the anode and a contact for the cathode are simultaneously created on the same side of the chip.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: April 24, 2012
    Inventors: Aram Tanielian, Garo Tanielian
  • Publication number: 20070077738
    Abstract: A method of fabricating plural bipolar transient voltage suppressors includes preparing a doped base material having a planar surface and then depositing onto the planar surface an doped epitaxial layer of opposite type thereby forming a semiconductor interface. The epitaxial layer is preferentially etched leaving mesas having side walls to the base material. An oxide layer is then deposited all over the upper surface and windows are etched in the oxide layer on the mesas. A high concentration of an appropriate dopant is diffused into the windows to establish ohmic contact surfaces for metallization of conductors. The base material is then bonded onto a substrate and cuts are made through to the base material so as to separate the mesas into adjacent pairs to provide plural bi-polar devices on the substrate.
    Type: Application
    Filed: October 3, 2005
    Publication date: April 5, 2007
    Inventors: Aram Tanielian, Garo Tanielian
  • Publication number: 20050278946
    Abstract: A plurality of individual circuits are formed on a substrate. Each of the individual circuits is formed with electrical contacts. A spacer is sealed onto the substrate, the spacer peripherally enclosing each of the individual circuits while exposing the conductive contacts. A cover is positioned over the spacer is and integral with it. First conductive feedthroughs penetrate the cover, the first conductive feedthroughs positioned peripheral to each of the individual circuits. Conductive pads are formed on a bottom surface of the cover, the conductive pads in electrical continuity with the conductive contacts of the individual circuits. Conductive paths are formed on the bottom surface of the cover, the conductive paths each joining at least one of the conductive pads with at least one of the first conductive feedthroughs thereby establishing electrical continuity between the individual circuits and the first conductive feedthroughs so as to establish pin-outs.
    Type: Application
    Filed: June 17, 2004
    Publication date: December 22, 2005
    Inventors: Aram Tanielian, Garo Tanielian, Keiichi Nakanishi