Patents by Inventor Garrett Douglas Blankenburg
Garrett Douglas Blankenburg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11710726Abstract: Power control and decoupling capacitance arrangements for integrated circuit devices are discussed herein. In one example, an assembly includes a first circuit assembly comprising a first circuit board coupled to an integrated circuit device, wherein the first circuit board is coupled to first surface of a system circuit board. The assembly also includes a second circuit assembly comprising a second circuit board having one or more voltage adjustment units configured to supply at least one input voltage to the integrated circuit device, wherein the second circuit board is coupled to a second surface of the system circuit board and positioned at least partially under a footprint of the integrated circuit device with respect to the system circuit board.Type: GrantFiled: June 25, 2019Date of Patent: July 25, 2023Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: William Paul Hovis, Gregory M. Daly, Rich Tat An, Andres Felipe Hernandez Mojica, Garrett Douglas Blankenburg
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Patent number: 11361772Abstract: Systems, methods, and software are disclosed herein for compressing audio data. In an implementation, sampled values of an audio signal have a dynamic range. A division of the dynamic range, into at least a lower range and an upper range, is identified based on a fixed mapping of a lower portion of the sampled values to a subset of quanta in a set of quanta having a depth less than a depth of the sampled values. Then an adaptive mapping of an upper portion of the sampled values to a remaining subset of quanta in the set of quanta is also identified, based at least on a dimension of the upper range. The fixed mapping is used to encode the lower portion of the sampled values based, while the adaptive mapping is used to encode the upper portion of the sampled values based on the adaptive mapping.Type: GrantFiled: May 14, 2019Date of Patent: June 14, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Gregory M. Daly, Garrett Douglas Blankenburg
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Patent number: 11105844Abstract: Power control arrangements for integrated circuit devices are discussed herein. In one example, an assembly includes an integrated circuit device comprising one or more processing cores and a power domain configured to distribute a supply voltage to the one or more processing cores. The assembly also includes a charge injection circuit coupled to the power domain of the integrated circuit device, and configured to selectively couple electric charge into the power domain to predictively offset at least portions of voltage transients in the power domain.Type: GrantFiled: June 28, 2019Date of Patent: August 31, 2021Assignee: Microsoft Technology Licensing, LLCInventors: William Paul Hovis, Gregory M. Daly, Rich Tat An, Andres Felipe Hernandez Mojica, Garrett Douglas Blankenburg
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Patent number: 11016551Abstract: Power supply circuitry and enhanced associated techniques are presented herein. In one example, a method includes powering a circuit with a plurality of power supply phases, and monitoring thermal properties of the plurality of power supply phases. Responsive to the thermal properties indicating at least one of the plurality of power supply phases exceeds a thermal threshold, the method includes selecting a dormant power supply phase to supplant the at least one of the plurality of power supply phases.Type: GrantFiled: March 29, 2019Date of Patent: May 25, 2021Assignee: Microsoft Technology Licensing, LLCInventors: Steven William Ranta, William Paul Hovis, Andres Felipe Hernandez Mojica, Rich Tat An, Garrett Douglas Blankenburg
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Patent number: 11010330Abstract: An example method for adjusting operation of an integrated circuit includes testing a plurality of electronic elements of the integrated circuit including one or more redundant electronic elements designated as inactive according to a manufacturer's default configuration of the integrated circuit to determine one or more operating parameters of the integrated circuit. The method further includes selecting a subset of electronic elements from the plurality of electronic elements based on the one or more operating parameters, wherein the subset of electronic elements is designated as active according to an updated configuration of the integrated circuit, and controlling operation of the integrated circuit using the updated configuration instead of the manufacturer's default configuration.Type: GrantFiled: May 2, 2018Date of Patent: May 18, 2021Assignee: Microsoft Technology Licensing, LLCInventors: William Paul Hovis, Peter A. Atkinson, Robert James Ray, Garrett Douglas Blankenburg, Andres Felipe Hernandez
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Publication number: 20210089364Abstract: Computing assemblies, such as blade servers, can be housed in rackmount systems of data centers for execution of applications for remote users. These applications can include games and other various user software. In one example, a method of operating a data processing system includes receiving requests for execution of a plurality of applications, and identifying estimated power demands for execution of each of the plurality of applications. The method also includes determining power limit properties for a plurality of computing modules capable of executing the plurality of applications, and selecting among the plurality of computing modules to execute ones of the plurality of applications based at least on the power limit properties and the estimated power demands.Type: ApplicationFiled: September 23, 2019Publication date: March 25, 2021Inventors: Garrett Douglas Blankenburg, William Paul Hovis, Andres Felipe Hernandez Mojica
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Patent number: 10928885Abstract: Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes executing a voltage characterization service for a processing device of a computing apparatus to determine at least one supply voltage for the processing device, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus. During execution of the voltage characterization service, the method includes monitoring for operational failures of at least the processing device, and responsive to the operational failures, determining at least one resultant supply voltage.Type: GrantFiled: January 28, 2019Date of Patent: February 23, 2021Assignee: Microsoft Technology Licensing, LLCInventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
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Publication number: 20200411494Abstract: Power control and decoupling capacitance arrangements for integrated circuit devices are discussed herein. In one example, an assembly includes a first circuit assembly comprising a first circuit board coupled to an integrated circuit device, wherein the first circuit board is coupled to first surface of a system circuit board. The assembly also includes a second circuit assembly comprising a second circuit board having one or more voltage adjustment units configured to supply at least one input voltage to the integrated circuit device, wherein the second circuit board is coupled to a second surface of the system circuit board and positioned at least partially under a footprint of the integrated circuit device with respect to the system circuit board.Type: ApplicationFiled: June 25, 2019Publication date: December 31, 2020Inventors: William Paul Hovis, Gregory M. Daly, Rich Tat An, Andres Felipe Hernandez Mojica, Garrett Douglas Blankenburg
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Publication number: 20200411495Abstract: Decoupling capacitance arrangements for integrated circuit devices are discussed herein. In one example, an assembly includes a first circuit assembly comprising a first circuit board coupled to an integrated circuit device, where the first circuit board is coupled to first surface of a system circuit board. The assembly includes a second circuit assembly comprising a second circuit board having decoupling capacitance for the integrated circuit device, where the second circuit board is coupled to a second surface of the system circuit board and positioned at least partially under a footprint of the integrated circuit device with respect to the system circuit board.Type: ApplicationFiled: June 25, 2019Publication date: December 31, 2020Inventors: William Paul Hovis, Gregory M. Daly, Rich Tat An, Andres Felipe Hernandez Mojica, Garrett Douglas Blankenburg
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Publication number: 20200408832Abstract: Power control arrangements for integrated circuit devices are discussed herein. In one example, an assembly includes an integrated circuit device comprising one or more processing cores and a power domain configured to distribute a supply voltage to the one or more processing cores. The assembly also includes a charge injection circuit coupled to the power domain of the integrated circuit device, and configured to selectively couple electric charge into the power domain to predictively offset at least portions of voltage transients in the power domain.Type: ApplicationFiled: June 28, 2019Publication date: December 31, 2020Inventors: William Paul Hovis, Gregory M. Daly, Rich Tat An, Andres Felipe Hernandez Mojica, Garrett Douglas Blankenburg
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Publication number: 20200409450Abstract: Voltage control arrangements for integrated circuit devices are discussed herein. In one example, a method includes receiving an indication of one or more software elements selected for execution by an integrated circuit device, and determining a target level of a supply voltage for the integrated circuit device based on the indication. The method also includes controlling voltage regulation circuitry to adjust a present level of the supply voltage for the integrated circuit device in accordance with the target level.Type: ApplicationFiled: June 28, 2019Publication date: December 31, 2020Inventors: William Paul Hovis, Gregory M. Daly, Rich Tat An, Andres Felipe Hernandez Mojica, Garrett Douglas Blankenburg
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Publication number: 20200365162Abstract: Systems, methods, and software are disclosed herein for compressing audio data. In an implementation, sampled values of an audio signal have a dynamic range. A division of the dynamic range, into at least a lower range and an upper range, is identified based on a fixed mapping of a lower portion of the sampled values to a subset of quanta in a set of quanta having a depth less than a depth of the sampled values. Then an adaptive mapping of an upper portion of the sampled values to a remaining subset of quanta in the set of quanta is also identified, based at least on a dimension of the upper range. The fixed mapping is used to encode the lower portion of the sampled values based, while the adaptive mapping is used to encode the upper portion of the sampled values based on the adaptive mapping.Type: ApplicationFiled: May 14, 2019Publication date: November 19, 2020Inventors: Gregory M. Daly, Garrett Douglas Blankenburg
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Publication number: 20200310519Abstract: Power supply circuitry and enhanced associated techniques are presented herein. In one example, a method includes powering a circuit with a plurality of power supply phases, and monitoring thermal properties of the plurality of power supply phases. Responsive to the thermal properties indicating at least one of the plurality of power supply phases exceeds a thermal threshold, the method includes selecting a dormant power supply phase to supplant the at least one of the plurality of power supply phases.Type: ApplicationFiled: March 29, 2019Publication date: October 1, 2020Inventors: Steven William Ranta, William Paul Hovis, Andres Felipe Hernandez Mojica, Rich Tat An, Garrett Douglas Blankenburg
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Patent number: 10755020Abstract: Computing assemblies, such as blade servers, can comprise a plurality of modular computing elements coupled onto an associated circuit board assembly. Assemblies and systems having enhanced individual computing module placement and arrangement are discussed herein, as well as example systems and operations to manufacture such assemblies. In one example, a method includes executing a performance test on a plurality of computing modules to determine at least variability in power consumption across the plurality of computing modules, and binning the plurality of computing modules according to graduated levels of the variability in power consumption. The method also includes selecting from among the graduated levels for placement in an assembly of ones of the computing modules in a progressively lower power consumption arrangement with relation to an airflow of the assembly.Type: GrantFiled: April 3, 2019Date of Patent: August 25, 2020Assignee: Microsoft Technology Licensing, LLCInventors: Andres Felipe Hernandez Mojica, William Paul Hovis, Garrett Douglas Blankenburg
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Patent number: 10613600Abstract: Examples are disclosed that relate cooling an electronic device based on power load. One disclosed example includes a controller configured to obtain a first measure of a power load, apply a filter to obtain a first filtered power load value, set a first thermal setpoint based at least on the first filtered power load value, determine a first temperature of the device, and adjust a response of the cooling mechanism based at least on the first thermal setpoint. The controller is further configured to obtain a second measure of the power load at a different time, apply the filter to obtain a second filtered power load value, set a second thermal setpoint based at least on the second filtered power load value, determine a second temperature of the device, and adjust the response of the cooling mechanism based at least on the second thermal setpoint.Type: GrantFiled: November 2, 2017Date of Patent: April 7, 2020Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Gregory M. Daly, Garrett Douglas Blankenburg, Andres Felipe Hernandez, Andrew C. Banks
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Publication number: 20190278741Abstract: An example method for adjusting operation of an integrated circuit includes testing a plurality of electronic elements of the integrated circuit including one or more redundant electronic elements designated as inactive according to a manufacturer's default configuration of the integrated circuit to determine one or more operating parameters of the integrated circuit. The method further includes selecting a subset of electronic elements from the plurality of electronic elements based on the one or more operating parameters, wherein the subset of electronic elements is designated as active according to an updated configuration of the integrated circuit, and controlling operation of the integrated circuit using the updated configuration instead of the manufacturer's default configuration.Type: ApplicationFiled: May 2, 2018Publication date: September 12, 2019Applicant: Microsoft Technology Licensing, LLCInventors: William Paul HOVIS, Peter A. ATKINSON, Robert James RAY, Garrett Douglas BLANKENBURG, Andres Felipe HERNANDEZ
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Patent number: 10338670Abstract: Voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of determining operating voltages for a processing device includes executing a voltage adjustment process to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage. During the voltage adjustment process, the method includes applying incrementally adjusted input voltages to the processing device, operating the processing device according to a functional test that exercises the processing device in context with associated system elements of a computing assembly, and monitoring for operational failures of at least the processing device during application of each of the incrementally adjusted input voltages.Type: GrantFiled: June 10, 2016Date of Patent: July 2, 2019Assignee: Microsoft Technology Licensing, LLCInventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
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Publication number: 20190171278Abstract: Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes executing a voltage characterization service for a processing device of a computing apparatus to determine at least one supply voltage for the processing device, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus. During execution of the voltage characterization service, the method includes monitoring for operational failures of at least the processing device, and responsive to the operational failures, determining at least one resultant supply voltage.Type: ApplicationFiled: January 28, 2019Publication date: June 6, 2019Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
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Patent number: 10310572Abstract: Thermal reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In a first example, a method of operating a voltage control system for a processing device includes operating the processing device in a computing assembly at a selected performance level, the processing device supplied with at least one input voltage at a first voltage level. The method includes monitoring thermal information associated with the computing assembly, and when the thermal information indicates a temperature associated with the computing assembly exceeds a threshold temperature, adjusting the at least one input voltage level supplied to the processing device to a second voltage level lower than the first voltage level and continuing to operate the processing device at the selected performance level.Type: GrantFiled: June 10, 2016Date of Patent: June 4, 2019Assignee: Microsoft Technology Licensing, LLCInventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
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Publication number: 20190129481Abstract: Examples are disclosed that relate cooling an electronic device based on power load. One disclosed example includes a controller configured to obtain a first measure of a power load, apply a filter to obtain a first filtered power load value, set a first thermal setpoint based at least on the first filtered power load value, determine a first temperature of the device, and adjust a response of the cooling mechanism based at least on the first thermal setpoint. The controller is further configured to obtain a second measure of the power load at a different time, apply the filter to obtain a second filtered power load value, set a second thermal setpoint based at least on the second filtered power load value, determine a second temperature of the device, and adjust the response of the cooling mechanism based at least on the second thermal setpoint.Type: ApplicationFiled: November 2, 2017Publication date: May 2, 2019Applicant: Microsoft Technology Licensing, LLCInventors: Gregory M. DALY, Garrett Douglas BLANKENBURG, Andres Felipe HERNANDEZ, Andrew C. BANKS