Patents by Inventor Garrett John Long

Garrett John Long has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Intelligent inspection based on test chip probe failure maps
    Patent number: 7715997
    Abstract: A method and system for semiconductor wafer inspection is disclosed. Each of a plurality of dies on a wafer may be probed with a probe tool to produce probe data. The probe data may be used to generate one or more non-repeating care areas. An inspection tool may use the non-repeating care areas to perform an inspection of the semiconductor wafer.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: May 11, 2010
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Garrett John Long, Saju Francis Olakengil, Pramod Gaud, John Jacob Roberts
  • INTELLIGENT INSPECTION BASED ON TEST CHIP PROBE FAILURE MAPS
    Publication number: 20090070055
    Abstract: A method and system for semiconductor wafer inspection is disclosed. Each of a plurality of dies on a wafer may be probed with a probe tool to produce probe data. The probe data may be used to generate one or more non-repeating care areas. An inspection tool may use the non-repeating care areas to perform an inspection of the semiconductor wafer.
    Type: Application
    Filed: September 11, 2007
    Publication date: March 12, 2009
    Inventors: Garrett John Long, Saju Francis Olakengil, Pramod Gaud, John Jacob Roberts