Patents by Inventor Gary A. Cardone

Gary A. Cardone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8825882
    Abstract: A data system architecture is described that allows multiple processing and storage resources to be connected to multiple clients so as 1) to distribute the clients' workload efficiently across the available resources; and 2) to enable scaleable expansion, both in terms of the number of clients and in the number of resources. The major features of the architecture are separate, modular, client and resource elements that can be added independently, a high-performance cross-bar data switch interconnecting these various elements, separate serial communication paths for controlling the cross-bar switch settings, separate communication paths for passing control information among the various elements and a resource utilization methodology that enables clients to distribute processing or storage tasks across all available resources, thereby eliminating “hot spots” resulting from uneven utilization of those resources.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: September 2, 2014
    Assignee: EMC Corporation
    Inventors: Raju C. Bopardikar, Jacob Y. Bast, Gary A. Cardone, David E. Kaufman, Stuart P. MacEachern, Bruce D. McLeod, James M. Nolan, Zdenek Radouch, Jack J. Stiffler, James A. Wentworth
  • Publication number: 20120324159
    Abstract: A data system architecture is described that allows multiple processing and storage resources to be connected to multiple clients so as 1) to distribute the clients' workload efficiently across the available resources; and 2) to enable scaleable expansion, both in terms of the number of clients and in the number of resources. The major features of the architecture are separate, modular, client and resource elements that can be added independently, a high-performance cross-bar data switch interconnecting these various elements, separate serial communication paths for controlling the cross-bar switch settings, separate communication paths for passing control information among the various elements and a resource utilization methodology that enables clients to distribute processing or storage tasks across all available resources, thereby eliminating “hot spots” resulting from uneven utilization of those resources.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 20, 2012
    Applicant: EMC CORPORATION
    Inventors: Raju C. BOPARDIKAR, Jacob Y. BAST, Gary A. CARDONE, David E. KAUFMAN, Stuart P. MACEACHERN, Bruce D. MCLEOD, James M. NOLAN, JR., Zdenek RADOUCH, Jack J. STIFFLER, James A. WENTWORTH, II
  • Patent number: 8291094
    Abstract: A data system architecture is described that allows multiple processing and storage resources to be connected to multiple clients so as 1) to distribute the clients' workload efficiently across the available resources; and 2) to enable scaleable expansion, both in terms of the number of clients and in the number of resources. The major features of the architecture are separate, modular, client and resource elements that can be added independently, a high-performance cross-bar data switch interconnecting these various elements, separate serial communication paths for controlling the cross-bar switch settings, separate communication paths for passing control information among the various elements and a resource utilization methodology that enables clients to distribute processing or storage tasks across all available resources, thereby eliminating “hot spots” resulting from uneven utilization of those resources.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: October 16, 2012
    Assignee: EMC Corporation
    Inventors: Raju C. Bopardikar, Jacob Y. Bast, Gary A. Cardone, David E. Kaufman, Stuart P. MacEachern, Bruce D. McLeod, James M. Nolan, Zdenek Radouch, Jack J. Stiffler, James A. Wentworth
  • Patent number: 8281022
    Abstract: A data system architecture is described that allows multiple processing and storage resources to be connected to multiple clients so as 1) to distribute the clients' workload efficiently across the available resources; and 2) to enable scaleable expansion, both in terms of the number of clients and in the number of resources. The major features of the architecture are separate, modular, client and resource elements that can be added independently, a high-performance cross-bar data switch interconnecting these various elements, separate serial communication paths for controlling the cross-bar switch settings, separate communication paths for passing control information among the various elements and a resource utilization methodology that enables clients to distribute processing or storage tasks across all available resources, thereby eliminating “hot spots” resulting from uneven utilization of those resources.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: October 2, 2012
    Assignee: EMC Corporation
    Inventors: Raju C. Bopardikar, Jacob Y. Bast, Gary A. Cardone, David E. Kaufman, Stuart P. MacEachern, Bruce D. McLeod, James M. Nolan, Jr., Zdenek Radouch, Jack J. Stiffler, James A. Wentworth, II
  • Publication number: 20060161678
    Abstract: A data system architecture is described that allows multiple processing and storage resources to be connected to multiple clients so as 1) to distribute the clients' workload efficiently across the available resources; and 2) to enable scaleable expansion, both in terms of the number of clients and in the number of resources. The major features of the architecture are separate, modular, client and resource elements that can be added independently, a high-performance cross-bar data switch interconnecting these various elements, separate serial communication paths for controlling the cross-bar switch settings, separate communication paths for passing control information among the various elements and a resource utilization methodology that enables clients to distribute processing or storage tasks across all available resources, thereby eliminating “hot spots” resulting from uneven utilization of those resources.
    Type: Application
    Filed: March 20, 2006
    Publication date: July 20, 2006
    Applicant: EMC Corporation
    Inventors: Raju Bopardikar, Jacob Bast, Gary Cardone, David Kaufman, Stuart MacEachern, Bruce McLeod, James Nolan, Zdenek Radouch, Jack Stiffler, James Wentworth
  • Publication number: 20060161642
    Abstract: A data system architecture is described that allows multiple processing and storage resources to be connected to multiple clients so as 1) to distribute the clients' workload efficiently across the available resources; and 2) to enable scaleable expansion, both in terms of the number of clients and in the number of resources. The major features of the architecture are separate, modular, client and resource elements that can be added independently, a high-performance cross-bar data switch interconnecting these various elements, separate serial communication paths for controlling the cross-bar switch settings, separate communication paths for passing control information among the various elements and a resource utilization methodology that enables clients to distribute processing or storage tasks across all available resources, thereby eliminating “hot spots” resulting from uneven utilization of those resources.
    Type: Application
    Filed: March 20, 2006
    Publication date: July 20, 2006
    Applicant: EMC Corporation
    Inventors: Raju Bopardikar, Jacob Bast, Gary Cardone, David Kaufman, Stuart MacEachern, Bruce McLeod, James Nolan, Zdenek Radouch, Jack Stiffler, James Wentworth
  • Patent number: 4791557
    Abstract: An information processing system includes a processor responsive to instructions for performing operations. The processor includes instruction queue for fetching and storing instructions in advance of execution and the system is responsive to certain of the instructions for causing execution of a corresponding sequence of instructions. A prefetch monitor includes circuitry for detecting instructions which may result in the execution of a corresponding sequence of instructions. The prefetch monitor further includes an instruction substitution circuit which is responsive to the detecting circuitry for inhibiting the reading of following instructions from a memory to the processor and is responsive to instruction fetching operation of the processor for reading null instructions to the processor.
    Type: Grant
    Filed: July 31, 1985
    Date of Patent: December 13, 1988
    Assignee: Wang Laboratories, Inc.
    Inventors: David J. Angel, Gary A. Cardone, Mark D. Holbrook, James P. Moskun, Bruce Patterson