Abstract: An OCN with memory device address decoding that enables communication among integrated processing elements, including a network, a processing element and a bus gasket. The network transfers packets between multiple ports, where each port conforms to a consistent port interface protocol. The processing element includes a bus and a memory device programmed with the address of each port, so that a transaction on the bus indicating another port is decoded by the memory device. The bus gasket includes a bus interface that generates packets and a port interface that sends and receives the packets according to the consistent port interface protocol and that uses the decoded address as a destination port address. The memory device may be implemented in any desired manner, such as a memory management unit (MMU) or a direct memory access (DMA) device.

Abstract: An OCN with independent logical and physical layers for enabling communication among integrated processing elements, including ports, bus gaskets and a physical layer interface. Each bus gasket includes a processor element interface and a port interface. Each processor element interface of at least two bus gaskets operates according to a first logical layer protocol. Each port interface operates according to a consistent port interface protocol by sending transaction requests and receiving acknowledgements and by sending and receiving packet datums via the corresponding port. The physical layer interface transfers packets between the ports and includes an arbiter and an interconnect coupled to each port. Additional bus gaskets may be added that operate according to a second logical layer protocol which may or may not be compatible with the first. Any bus gasket may be added that is configured to communicate using multiple logical layer protocols.

Abstract: Methods are provided for adjusting flying characteristics of magnetic recording media, e.g., sealed disk drives. Adjustment may be made by changing at least one environmental condition within the drive enclosure of the disk drive prior to sealing. Alternatively, adjustment may be made by changing the speed of the disk drive, i.e., the speed at which the disk spins. Methods are also provided for error correction within sealed disk drives.

Abstract: Expandable emboli filter and thrombectomy devices adapted for use with microcatheters to remove debris from blood vessels. The devices embody expanded profiles that span the entirety of various sized target vessels and thus are particularly effective in the engagement of debris found in vessels.

Abstract: Systems and apparatus are described for modifying fluid flow in a hard disk drive system to reduce cross-track motion. The systems and methods provide advantages because they include at least one flow modification element. In some embodiments, the flow modification system comprises a set of approximately parallel combs occupying a portion of the space present in between the disks in the hard disk drive system. The combs change the flow pattern of the fluid and act as a momentum channeling mechanism relative to the actuator assembly and suspension assemblies resulting in a considerable reduction in track misregistration error. Various embodiments of the invention include baffle-integrated combs, fixture-integrated combs, contoured enclosure surfaces, and enclosure attached combs.

Abstract: 85A system for referring a telephone communication to one of a plurality of financial assistance providers based on lender criteria, the method including the steps of: storing telephone numbers for a plurality of financial assistance providers in memory accessible by a digital electrical computer; obtaining lender criteria for selecting one of the financial assistance providers; storing said criteria for access by said computer; identifying a debtor; selecting one of the financial assistance providers by accessing the criteria, applying the criteria, and accessing one of the stored telephone numbers; and connecting the debtor by telephone to the one of the stored telephone numbers.

Abstract: The present invention relates to a system and method for supporting DMA I/O devices. A PCI-PCI bridge is provided to support DMA I/O devices on the PCI bus. Through the use of two signal lines and a serial link, DMA transfers may be accomplished over the PCI bus. A PCI-ISA dock bridge is also provided to allow the system to support DMA I/O devices and ISA masters (i.e., any device including DMA I/O devices on the ISA bus that generates ISA cycles) on the ISA bus.

Abstract: A portable computer and corresponding docking station, where the portable computer may be inserted into or removed from the docking station without concern relating to the state of either the portable computer or of the docking station. The hot docking sequence is performed by establishing a direct connection to the primary PCI bus without the risk of any possible system damage, file damage, or data loss. This can be accomplished even while the portable computer system is powered on and is actively running. The present invention prevents glitches from occurring in pre-existing pins and adds four new pins to implement this novel hot docking sequence. Furthermore, hot undocking can be readily performed as well by basically reversing the docking sequence.

Abstract: A digital computing system includes a first and second processor clocked for locked step operation. A shared memory stores a linear block codeword across a plurality of byte-wide memory devices. The codeword includes a first dataword and a second dataword. Each of the first and second datawords includes an equal plurality of databits and each includes an equal plurality of checkbits associated therewith. First error detection and correction logic connected to the first processor receives the first dataword and checkbits associated therewith of the codeword addressed by the first processor and a second dataword and checkbits associated therewith of the codeword addressed by the second processor. First error detection and correction logic detects and/or corrects errors in the codeword.

Abstract: A computer system includes a central processing unit (CPU), system read-only memory (ROM), a random access memory (RAM) and a system controller. The system ROM includes a reset vector. A portion of the RAM is used to shadow the system ROM. The system controller is connected between the CPU, the system ROM and the RAM. The system memory includes an internal memory for storing first data. The system memory also includes logic which, in response to receiving an access to a reset vector stored in the system ROM, returns the first data stored in the internal memory.

Abstract: The present invention relates to a system and method for starting and maintaining a Central Processing Unit (CPU) clock even though the CPU clock is operating under a Clock Division Emulation (CDE) scheme. Break Events are broken into different groups with each group of Break Events being mapped to a particular programmable event timer. Each of the programmable event timers have an associated time limit which will keep the CPU clock running for a time commensurate with that group of Break Events. When a Break Event occurs, the programmable event timer associated with that particular Break Event will load the corresponding time limit into the programmable event timer. Once loaded, the programmable event timer will keep the CPU clock running during the entire time limit. Only after all of the programmable event timers have counted down will the CPU clock be allowed to stop.

Abstract: A system and method for emulating the state of a soft reset within a processor device without requiring a dedicated soft reset external pin associated with said processor device. The novel system includes control circuitry coupled to a processor device for detecting a number of conditions used to cause the processor device to execute a soft reset. In processor devices that contain a write-back cache, the soft reset signal resets the configuration of the processor device and returns the processor to "real-address mode" addressing, but does not destroy the contents of the write-back cache (unlike a regular reset). Upon detecting a soft reset attempt, the novel system generates a System Management Interrupt (SMI) which is responded to by an interrupt handling routine also of the novel system. This interrupt handling routine contains a set of configuration data (stored in memory) that represents the expected state of the processor device after a soft reset.

Abstract: A system for altering a clock frequency to a logic controlling device that controls logic which runs at a fixed frequency slower than a frequency of a computer system running the logic. The system speeds up the clock signal to a logic controller when the logic controller is arbitrating between different operational requests. When the logic controller acknowledges a specific operational request, the clock controller immediately slows the clock signal down in order to allow a command strobe length that the logic device executing a specific operation request requires.

Abstract: A method for maximizing the performance versus the power consumption of a computer system. The method uses a CPU which has the ability to select an optimum external to internal clock frequency ratio. By changing the external to internal clock frequency ratio, the computer system is able to decrease the internal clock frequency in order to conserve power, while allowing the external clock frequency to be at an optimum level in order to maintain maximum system performance.

Abstract: An I/O holdoff mechanism is used to compensate for I/O device inputs being fed through a latency introducing bus. A system includes one or more I/O devices connected through a serial bus to a controller device. Each I/O device includes at least one request pin which is connected to a peripheral device. A serializer in the I/O device responds to a voltage transition occurring on any request pin of the I/O device by forwarding, in a packet over the serial bus, an indicator. The indicator indicates a current voltage on the request pin of the I/O device on which the voltage transition occurred. The controller device includes a deserializer and a bus controller. The deserializer receives the first packet and outputs a signal which indicates a current value for the voltage on the indicated request pin. The deserializer includes a busy output which indicates when the deserializer is busy and when the deserializer is idle.

Abstract: A computing system encodes and emulates requests signals, such as DMA requests or interrupt requests. A first peripheral device is connected to a first request pin of a first input/output (I/O) device. When the first peripheral device asserts a first request signal on the first request pin, a serializer within the first I/O device generates a first packet. The serializer forwards the first packet to a serial out port of the first I/O device. The first packet identifies the type of request and the direction of the edge transition. The serial out port forwards the first packet to a serial in port of a controller device. Upon the serial in port receiving the first packet, an unserializer within the controller device asserts an emulated first request signal, the emulated first request signal being coupled to a first request controller within the controller device.

Abstract: A attachable type beach towel and chair cover combination for being attached to virtually all types of outdoor seating apparatus, comprising: a elongated substantially rectangularly shaped main body portion of textile fabric beach towel (10) having a pair of side edges and a pair of ends. At the ends are four attaching straps (12) permanently attached at end portions and spaced inwardly from the side edges and four corresponding attaching tabs (14) permanently attached to main body of the beach towel (10) spaced inwardly from the side edges and end portions. The attaching straps (12) and the attaching tabs (14) will be of the hook and loop type fastening system. Two attaching straps (12) and two corresponding attaching tabs (14) will be on opposite sides of the central axis parallel to the side edges and to the central axis parallel to the ends of the beach towel (10), thus making the location of each attaching strap (12) and its corresponding attaching tab (14) generally symmetrical to the others.

Abstract: A flexure mount particularly adapted for use in a dynamically tuned gyroscope provides a universal coupling between a rotor element and a drive shaft. The mount features a substantially planar "spider" member oriented transversely to the spin axis of the rotor. The spider has four webs that each extend radially from an inner gimbal ring to a segmented outer ring having four independent sectors each associated with and centered on one of the webs. Two mutually perpendicular "vertical" or cross flexure members each have key portions that extend through radial slots in the webs of the spider. The inner gimbal ring and the spider have central apertures coaxial with the spin axis. An alignment member is seated in the aligned apertures. The vertical flexure members are seated in a set of mutually perpendicular and axially extending slots formed in the alignment member. The spider and the cross members are preferably etched or stamped from precision rolled sheet material.