Patents by Inventor Gary Allen Gibson

Gary Allen Gibson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140331234
    Abstract: Execution of a plurality of tasks by a processor system are monitored. Based on this monitoring, tasks requiring adjustment of performance resources are identified by calculating at least one of a progress error or a progress limit error for each task. Thereafter, performance resources of the processor system allocated to each identified task are adjusted. Such adjustment can comprise: adjusting a clock rate of at least one processor in the processor system executing the task, adjusting an amount of cache and/or buffers to be utilized by the task, and/or adjusting an amount of input/output (I/O) bandwidth to be utilized by the task. Related systems, apparatus, methods and articles are also described.
    Type: Application
    Filed: July 15, 2014
    Publication date: November 6, 2014
    Inventors: Gary Allen Gibson, Valeri Popescu
  • Publication number: 20140201456
    Abstract: Techniques are described for controlling processor cache memory within a processor system. Cache occupancy values for each of a plurality of entities executing the processor system can be calculated. A cache replacement algorithm uses the cache occupancy values when making subsequent cache line replacement decisions. In some variations, entities can have occupancy profiles specifying a maximum cache quota and/or a minimum cache quota which can be adjusted to achieve desired performance criteria. Related methods, systems, and articles are also described.
    Type: Application
    Filed: March 18, 2014
    Publication date: July 17, 2014
    Applicant: VirtualMetrix, Inc.
    Inventors: Gary Allen Gibson, Valeri Popescu
  • Patent number: 8782653
    Abstract: Execution of a plurality of tasks by a processor system are monitored. Based on this monitoring, tasks requiring adjustment of performance resources are identified by calculating at least one of a progress error or a progress limit error for each task. Thereafter, performance resources of the processor system allocated to each identified task are adjusted. Such adjustment can comprise: adjusting a clock rate of at least one processor in the processor system executing the task, adjusting an amount of cache and/or buffers to be utilized by the task, and/or adjusting an amount of input/output (I/O) bandwidth to be utilized by the task. Related systems, apparatus, methods and articles are also described.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: July 15, 2014
    Assignee: VirtualMetrix, Inc.
    Inventors: Gary Allen Gibson, Valeri Popescu
  • Patent number: 8677071
    Abstract: Techniques are described for controlling processor cache memory within a processor system. Cache occupancy values for each of a plurality of entities executing the processor system can be calculated. A cache replacement algorithm uses the cache occupancy values when making subsequent cache line replacement decisions. In some variations, entities can have occupancy profiles specifying a maximum cache quota and/or a minimum cache quota which can be adjusted to achieve desired performance criteria. Related methods, systems, and articles are also described.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: March 18, 2014
    Assignee: Virtualmetrix, Inc.
    Inventors: Gary Allen Gibson, Valeri Popescu
  • Publication number: 20110238919
    Abstract: Techniques are described for controlling processor cache memory within a processor system. Cache occupancy values for each of a plurality of entities executing the processor system can be calculated. A cache replacement algorithm uses the cache occupancy values when making subsequent cache line replacement decisions. In some variations, entities can have occupancy profiles specifying a maximum cache quota and/or a minimum cache quota which can be adjusted to achieve desired performance criteria. Related methods, systems, and articles are also described.
    Type: Application
    Filed: March 25, 2011
    Publication date: September 29, 2011
    Inventors: Gary Allen Gibson, Valeri Popescu
  • Publication number: 20110239220
    Abstract: Execution of a plurality of tasks by a processor system are monitored. Based on this monitoring, tasks requiring adjustment of performance resources are identified by calculating at least one of a progress error or a progress limit error for each task. Thereafter, performance resources of the processor system allocated to each identified task are adjusted. Such adjustment can comprise: adjusting a clock rate of at least one processor in the processor system executing the task, adjusting an amount of cache and/or buffers to be utilized by the task, and/or adjusting an amount of input/output (I/O) bandwidth to be utilized by the task. Related systems, apparatus, methods and articles are also described.
    Type: Application
    Filed: March 25, 2011
    Publication date: September 29, 2011
    Inventors: Gary Allen Gibson, Valeri Popescu