Patents by Inventor Gary B. Cole

Gary B. Cole has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5058106
    Abstract: A system that provides a signal in an assigned time slot of a multi-time slot repetitive frame, the assigned time slot being determined by input data that changes only on occasion, includes a flywheel circuit for reducing the chance that intermittent errors in the data input may cause the signal to be provided in an incorrect time slot. The flywheel circuit includes a time slot counter synchronized to provide a zero count during the assigned time slot and to initiate an output signal whenever the zero count occurs. The timing of a particular count of the counter is compared to the timing of the signal from the system during each frame, and if the timing does not correspond in a predetermined manner for a predetermined number of consecutive frames, the counter is re-synchronized to the timing of the signal from the system.
    Type: Grant
    Filed: December 15, 1989
    Date of Patent: October 15, 1991
    Assignee: Alcatel NA Network Systems Corp.
    Inventor: Gary B. Cole
  • Patent number: 5033067
    Abstract: A variable length shift register is formed of a plurality of flip-flops arranged to form separate shift registers of different lengths. The shift registers are interconnected by multiplexers which connect either the input or the output of each shift register to the input of an adjacent shift register. Control signals are provided to the multiplexers to controllably select the length of the variable shift register by selectively inserting shift registers into the variable shift register and bypassing others.
    Type: Grant
    Filed: December 15, 1989
    Date of Patent: July 16, 1991
    Assignee: Alcatel NA Network Systems Corp.
    Inventors: Gary B. Cole, Michael J. Gingell
  • Patent number: 4993019
    Abstract: A line unit interface circuit used on line units in a line shelf of a digital loop carrier provides all of the logic necessary to access two subscriber lines to a line unit interface bus connected to common equipment within the line shelf. Information received from the common equipment includes signaling data, configuration data and provisioning data, which is reconfigured and processed by the line unit interface circuit for controlling the subscriber line channels. Configuration data from the common equipment is decoded to assign time slots on the line unit interface bus to the various channels serviced by the line shelf and to further provide for a timing offset between the transmit and receive strobes provided to each subscriber line circuit. A flywheel circuit is used to prevent erroneous time slot assignment in the event of noise or interference on the line unit interface bus.
    Type: Grant
    Filed: December 15, 1989
    Date of Patent: February 12, 1991
    Assignee: Alcatel NA
    Inventors: Gary B. Cole, Michael J. Gingell, Joseph E. Sutherland, Paul M. Matsumura