Abstract: The present disclosure provides techniques for creating a symmetrical ball grid array pattern for an integrated circuit package. The ball grid array includes a symmetrical pattern of circuit connection points, wherein the symmetrical pattern is derived from a base hexagonal pattern that is repeated in at least one or more sections of the ball grid array.

Abstract: The present disclosure provides techniques for creating a symmetrical ball grid array pattern for an integrated circuit package. The ball grid array includes a symmetrical pattern of circuit connection points, wherein the symmetrical pattern is derived from a base hexagonal pattern that is repeated in at least one or more sections of the ball grid array.

Abstract: Modification of the connections between a die package and a system board is described. In one example a pattern redistribution module is used in a socket. The module has a first array of contacts on one side of the module. The contacts have a first configuration to connect to the socket. A second array of contacts is on another side of the module opposite the first array of contacts and has a second configuration to connect to a package containing a die. A board is between the first and the second array of contacts to interconnect contacts of the first array of contacts to contacts of the second array of contacts.

Abstract: Modification of the connections between a die package and a system board is described. In one example a pattern redistribution module is used in a socket. The module has a first array of contacts on one side of the module. The contacts have a first configuration to connect to the socket. A second array of contacts is on another side of the module opposite the first array of contacts and has a second configuration to connect to a package containing a die. A board is between the first and the second array of contacts to interconnect contacts of the first array of contacts to contacts of the second array of contacts.

Abstract: In some embodiments, an electronic device comprises a circuit board, an antenna structure on the circuit board, and a waveguide mounted on the circuit board above the antenna structure. Other embodiments may be described.

Abstract: In some embodiments, an electronic device comprises a circuit board, an antenna structure on the circuit board, and a waveguide mounted on the circuit board above the antenna structure. Other embodiments may be described.

Abstract: An apparatus that includes a plurality of metalized planes, one or more dielectric layers separating the plurality of metalized planes; and one or more conductive trenches connecting to at least one of the plurality of metalized planes.

Abstract: An apparatus that includes a plurality of metalized planes, one or more dielectric layers separating the plurality of metalized planes; and one or more conductive trenches connecting to at least one of the plurality of metalized planes.

Abstract: In some embodiments a channel is formed by combining two imprinted subparts each made of printed circuit board material and the imprinted subparts are laminated to form a waveguide. Other embodiments are described and claimed.

Abstract: In some embodiments a printed circuit board is fabricated using printed circuit board material, and a waveguide is formed that is contained within the printed circuit board material. Other embodiments are described and claimed.

Abstract: A printed circuit board structure includes a plurality of layers. The plurality of layers includes at least one metal layer or partial metal layer and at least one dielectric layer of a first type. The plurality of layers also includes two dielectric layers of a second type that is different from the first type. The at least one dielectric layer of the first type is between the two dielectric layers of the second type. The dielectric layers of the second type have a moisture absorption characteristic not in excess of 0.1%.

Abstract: An article of manufacture includes a circuit board and a pair of traces on or in the circuit board. The pair of traces includes a first trace and a second trace. The first trace includes a first segment and a second segment continuously joined to the first segment. The first segment coincides with a first longitudinal axis. The second trace includes a first segment that runs alongside the first segment of the first trace. The second trace also includes a second segment that runs alongside the second segment of the first trace. The second segment of the second trace is continuously joined to the first segment of the second trace. The second segment of the second trace coincides with the first longitudinal axis.

Abstract: A method, system, and apparatus for high data rate parallel plate mode signaling.

Abstract: In some embodiments a channel is formed by combining two imprinted subparts each made of printed circuit board material and the imprinted subparts are laminated to form a waveguide. Other embodiments are described and claimed.

Abstract: In some embodiments a channel is formed in printed circuit board material, the formed channel is plated to form at least two side walls of an embedded waveguide, and printed circuit board material is laminated to the plated channel. Other embodiments are described and claimed.

Abstract: In some embodiments a high speed interconnect includes a layer of FR4 material, a trench in the layer of FR4 material, and a pair of transmission lines located near the trench. The trench is filled with a homogenous material. Other embodiments are described and claimed.

Abstract: A method of making a printed circuit board panel, a printed circuit board panel made according to the method, and a system incorporating a printed circuit board provided onto the panel. The printed circuit board panel has a panel top edge, a panel bottom edge parallel to the panel top edge, and two parallel panel side edges, and further includes a first set of fiber bundles extending at the predetermined angle with respect to the panel side edges, and a second set of fiber bundles extending at the predetermined angle with respect to the panel top edge.

Abstract: A method for forming a multilayer substrate from two or more constituent substrates and an interface material. Electrically conductive or nonconductive features may be formed into the interface material and registered to electrically conductive or nonconductive features at the surface of at least one of the constituent substrates. Thereby, electrical communication may be provided between conductive features of the constituent substrates and the interface material.

Abstract: The invention provides an optical connection between a component on a printed circuit board (“PCB”) and an optical fiber embedded in the PCB. By optically connecting the component with the optical fiber, the component may use the optical fiber for high speed optical data communication.

Abstract: A method, system, and apparatus for high data rate parallel plate mode signaling.