Abstract: In order to continually receive messages in a dual personal computer system (PC) and personal digital assistant system (PDA) computer architecture, the PC system is deactivated to conserve battery power while the PDA continues to receive messages. As PDA memory is filled with messages, messages that are synchronized and archived with the PC system are 5 deleted and space is freed for incoming messages. When new and non-synchronized messages completely fill the PDA memory array, the PC system is reactivated or the user is informed.

Abstract: A secured communication channel is established between two or more information handling systems by defining attributes for encrypting information with physical inputs made at touch devices of the information handling systems. Inputting the physical gesture at a touch device of each information handling system allows evaluation of one or more attributes at each information handling system so that the shared secret of the physical gesture form the basis for encrypted communications. The touch device includes touch screens or touch pads and the attributes include gesture speed, plural distinct gesture touch points, movement of touch points relative to each other, or other attributes that are determinable from physical gesture inputs at each information handling system.

Abstract: In order to continually receive messages in a dual personal computer system (PC) and personal digital assistant system (PDA) computer architecture, the PC system is deactivated to conserve battery power while the PDA continues to receive messages. As PDA memory is filled with messages, messages that are synchronized and archived with the PC system are 5 deleted and space is freed for incoming messages. When new and non-synchronized messages completely fill the PDA memory array, the PC system is reactivated or the user is informed.

Abstract: In order to continually receive messages in a dual personal computer system (PC) and personal digital assistant system (PDA) computer architecture, the PC system is deactivated to conserve battery power while the PDA continues to receive messages. As PDA memory is filled with messages, messages that are synchronized and archived with the PC system are deleted and space is freed for incoming messages. When new and non-synchronized messages completely fill the PDA memory array, the PC system is reactivated or the user is informed.

Abstract: A secured communication channel is established between two or more information handling systems by defining attributes for encrypting information with physical inputs made at touch devices of the information handling systems. Inputting the physical gesture at a touch device of each information handling system allows evaluation of one or more attributes at each information handling system so that the shared secret of the physical gesture form the basis for encrypted communications. The touch device includes touch screens or touch pads and the attributes include gesture speed, plural distinct gesture touch points, movement of touch points relative to each other, or other attributes that are determinable from physical gesture inputs at each information handling system.

Abstract: In order to continually receive messages in a dual personal computer system (PC) and personal digital assistant system (PDA) computer architecture, the PC system is deactivated to conserve battery power while the PDA continues to receive messages. As PDA memory is filled with messages, messages that are synchronized and archived with the PC system are deleted and space is freed for incoming messages. When new and non-synchronized messages completely fill the PDA memory array, the PC system is reactivated or the user is informed.

Abstract: A simple to customize IT infrastructure architecture. The IT infrastructure architecture includes a general-purpose virtualized architecture platform. The IT infrastructure architecture is well suited for delivering simple pre-packaged software solutions to the small business segment as plug and play type appliances. In certain preferred embodiments, the IT infrastructure architecture includes a virtual appliance memory device such as a virtual appliance universal serial bus (USB) key. The IT infrastructure architecture uses embedded server virtualization technology to host business applications as a virtual appliance.

Abstract: An integrated computer system includes a computer system, having at least a display, a chassis, a memory, a power supply and a communication interface, and a personal digital communications (PDC) system, having at least a display, a memory, a battery and a communication interface. The computer chassis is configured to removably retain the PDC system in a docked mode, and when in said docked mode the PDC system is operable to communicate with the computer system through the respective communication interfaces and the computer system is operable to send data from the computer memory to the PDC system. The PDC system is operable to receive said data and store said data in the PDC memory and to display at least a subset of said data on the PDC display when the computer system is powered on or off.

Abstract: In order to provide desirable features of a low power personal digital (PDA) and a powerful computing personal computer (PC), the PDA and the PC are combined as one integrated computer architecture. When low power consumption is desired, the PDA controls the computer architecture, and when increased computing power is needed the PC is given control of the computer architecture. To maintain portability feature of a small size PDA a removable or detachable PDA is integrated into the chassis housing the computer architecture. The PDA is housed in a package that may be placed in an expansion bay or connected to the exterior of the chassis. The PDA has its own separate memory, input device, display and battery so it can operate independently. Interface connections are provided on the PDA in order to connect to the computer architecture.

Abstract: A method of operating a computer system with a central processing unit, a plurality of peripheral units coupled with the central processing unit, and a power management unit coupled with the central processing unit and the plurality of peripheral units for reducing power consumption during a stand-by mode, whereby a suspend routine is executed to transition from a normal operating mode into a stand-by mode and a resume routine is executed to transition back from a stand-by mode to a normal operating mode, moves specific moveable tasks from the resume routine path to the suspend routine path. Thus, recovery from a stand-by mode is performed much faster.

Abstract: In order to provide desirable features of a low power personal digital (PDA) and a powerful computing personal computer (PC), the PDA and the PC are combined as one integrated computer architecture. When low power consumption is desired, the PDA controls the computer architecture, and when increased computing power is needed the PC is given control of the computer architecture. To maintain portability feature of a small size PDA a removable or detachable PDA is integrated into the chassis housing the computer architecture. The PDA is housed in a package that may be placed in an expansion bay or connected to the exterior of the chassis. The PDA has its own separate memory, input device, display and battery so it can operate independently. Interface connections are provided on the PDA in order to connect to the computer architecture.

Abstract: In order to continually receive messages in a dual personal computer system (PC) and personal digital assistant system (PDA) computer architecture, the PC system is deactivated to conserve battery power while the PDA continues to receive messages. As PDA memory is filled with messages, messages that are synchronized and archived with the PC system are deleted and space is freed for incoming messages. When new and non-synchronized messages completely fill the PDA memory array, the PC system is reactivated or the user is informed.

Abstract: An object-oriented processor and method of operating such a processor are disclosed. According to the method, in response to receiving a first instruction that references a first object having both data and at least a first method associated therewith, an address of the first method is calculated. In addition, at least one pointer is cached that indicates (possibly together with other pointers) the address of the first method. In response to receipt of a subsequent second instruction that references a second object having both data and one or more methods associated therewith, where the one or more methods include the first method, the address of a second method associated with the second object is determined by reference to the cached pointer. In a preferred embodiment of the present invention, the first and second methods comprise the same method, and the cached pointer indicates the entry point of that single method.

Abstract: A method and apparatus for assisting garbage collection process within a Java virtual machine are disclosed. A virtual object heap and a physical object heap are provided within the Java virtual machine, with the virtual object heap considerably larger than the physical object heap. Objects from Java applications are allocated within the virtual object heap. Each address of the allocated objects within the virtual object heap is translated into an address of a location within the physical object heap. Garbage collection is performed in the virtual object heap only when a total number of objects within the virtual object heap has reached a predetermined threshold.

Abstract: The present invention provides a method and system for using hardware to assist software in emulating the guest instructions. The method and system comprises an emulation assist unit (EAU) which efficiently maps a guest instruction to a unique tag, an index, and an address of the corresponding semantic routine. The index determines where in a cache a plurality of tags are stored. A separate cache within the EAU stores each tag in association with the address the first time the corresponding guest instruction is emulated. Thus, the emulation assist unit also dynamically responds to the set of guest instructions being emulated. The first time a guest instruction is emulated, the EAU determines the address and stores the address in the cache in association with the tag. When the guest instruction is emulated again, the EAU uses the tag to access the stored addresses of the corresponding semantic routine.