Patents by Inventor Gary E. Schiessler

Gary E. Schiessler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8040984
    Abstract: Methods and apparatus are provided for improving the jitter tolerance in an SFP limit amplified signal. Jitter tolerance is improved in a communications receiver by applying a received signal to an SFP limiting amplifier; and applying an output of the SFP limiting amplifier to a low pass filter to improve the jitter tolerance. The low pass filter optionally applies a programmable amount of attenuation to high frequency components of the output. The low pass filter slew rate controls (i.e., rotates) a data eye representation of the received signal to increase the data eye representation along a time axis. The noise margin of the received signal can optionally be improved by applying an output of the low pass filter to an all pass filter. A slew rate controller can evaluate the data eye statistics to determine a setting for the low pass filter.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: October 18, 2011
    Assignee: Agere System Inc.
    Inventors: Pervez M. Aziz, Adam B. Healey, Mohammad S. Mobin, Gary E. Schiessler, Gregory W. Sheets, Lane A. Smith, Paul H. Tracy, Geoffrey Zhang
  • Patent number: 7711043
    Abstract: Methods and apparatus are provided for determining the threshold position of one or more latches employed for decision-feedback equalization. A threshold position of a latch employed by a decision-feedback equalizer is determined by constraining input data such that the input data only contains transitions from a first binary value; obtaining a plurality of samples of a single-sided data eye associated with the constrained input data; and determining a threshold position of the latch based on the samples. The constrained input data can comprise (i) transitions from a binary value of 1 to a binary value of 0 or 1; or (ii) transitions from a binary value of 0 to a binary value of 0 or 1. The size of the single-sided data eye can be obtained by analyzing a histogram associated with the single-sided data eye to identify a region having a constant hit count.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: May 4, 2010
    Assignee: Agere Systems Inc.
    Inventors: Mohammad S. Mobin, Gary E. Schiessler, Gregory W. Sheets, Vladimir Sindalovsky, Lane A. Smith
  • Publication number: 20090168940
    Abstract: Methods and apparatus are provided for improving the jitter tolerance in an SFP limit amplified signal. Jitter tolerance is improved in a communications receiver by applying a received signal to an SFP limiting amplifier; and applying an output of the SFP limiting amplifier to a low pass filter to improve the jitter tolerance. The low pass filter optionally applies a programmable amount of attenuation to high frequency components of the output. The low pass filter slew rate controls (i.e., rotates) a data eye representation of the received signal to increase the data eye representation along a time axis. The noise margin of the received signal can optionally be improved by applying an output of the low pass filter to an all pass filter. A slew rate controller can evaluate the data eye statistics to determine a setting for the low pass filter.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 2, 2009
    Inventors: Pervez M. Aziz, Adam B. Healey, Mohammad S. Mobin, Gary E. Schiessler, Gregory W. Sheets, Lane A. Smith, Paul H. Tracy, Geoffrey Zhang
  • Patent number: 7447965
    Abstract: Communications equipment can be tested using a test pattern encapsulated within a frame, and offsetting the test pattern in each successive frame. In equipment having a number of data latches receiving serial input, the introduction of the offset allows each latch, over time, to be exposed to the same pattern as the other latches. That is, the latches “see” different portions of the pattern at a given time, but over time, each can be exposed to the full pattern. Otherwise, each latch would “see” its own static pattern, different from the other latches, but the same over time with respect to itself. The offset can enhance diagnostic capabilities of the test pattern.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: November 4, 2008
    Assignee: Agere Systems Inc.
    Inventors: Robert D. Brink, James Walter Hofmann, Jr., Max J. Olsen, Gary E. Schiessler, Lane A. Smith
  • Publication number: 20080080608
    Abstract: Methods and apparatus are provided for determining the threshold position of one or more latches employed for decision-feedback equalization. A threshold position of a latch employed by a decision-feedback equalizer is determined by constraining input data such that the input data only contains transitions from a first binary value; obtaining a plurality of samples of a single-sided data eye associated with the constrained input data; and determining a threshold position of the latch based on the samples. The constrained input data can comprise (i) transitions from a binary value of 1 to a binary value of 0 or 1; or (ii) transitions from a binary value of 0 to a binary value of 0 or 1. The size of the single-sided data eye can be obtained by analyzing a histogram associated with the single-sided data eye to identify a region having a constant hit count.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Mohammad S. Mobin, Gary E. Schiessler, Gregory W. Sheets, Vladimir Sindalovsky, Lane A. Smith
  • Patent number: 7272756
    Abstract: Communications equipment can be tested using a test pattern that is modified compared to, and more exploitive than, a standard test pattern. Test patterns can be employed that have lengthened or shortened consecutive identical digit (CID) portions, or that have lengthened or shortened pseudo random bit sequence (PRBS) portions. In some cases, PRBS polynomials are not re-seeded after each CID. Further, different order polynomials can be employed for different applications. Exemplary applications can include test equipment and built-in self-test capability for integrated circuits.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: September 18, 2007
    Assignee: Agere Systems Inc.
    Inventors: Robert D. Brink, James Walter Hofmann, Jr., Max J. Olsen, Gary E. Schiessler, Lane A. Smith