Patents by Inventor Gary Foley

Gary Foley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8945980
    Abstract: A method is provided for forming an alkali metal-doped solution-processed metal chalcogenide. A first solution is formed that includes a first material group of metal salts, metal complexes, or combinations thereof, dissolved in a solvent. The first material group may include one or more of the following elements: copper (Cu), indium (In), and gallium (Ga). An alkali metal-containing material is added to the first solution, and the first solution is deposited on a conductive substrate. The alkali metal-containing material may be sodium (Na). An alkali metal-doped first intermediate film results, comprising metal precursors from corresponding members of the first material group. Then, thermally annealing is performed in an environment of selenium (Se), Se and hydrogen (H2), hydrogen selenide (H2Se), sulfur (S), S and H2, hydrogen sulfide (H2S), or combinations thereof. The metal precursors in the alkali metal-doped first intermediate film are transformed, and an alkali metal-doped chalcogenide layer is formed.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: February 3, 2015
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Sean Vail, Gary Foley, Alexey Koposov
  • Publication number: 20140162400
    Abstract: A method is provided for forming an alkali metal-doped solution-processed metal chalcogenide. A first solution is formed that includes a first material group of metal salts, metal complexes, or combinations thereof, dissolved in a solvent. The first material group may include one or more of the following elements: copper (Cu), indium (In), and gallium (Ga). An alkali metal-containing material is added to the first solution, and the first solution is deposited on a conductive substrate. The alkali metal-containing material may be sodium (Na). An alkali metal-doped first intermediate film results, comprising metal precursors from corresponding members of the first material group. Then, thermally annealing is performed in an environment of selenium (Se), Se and hydrogen (H2), hydrogen selenide (H2Se), sulfur (S), S and H2, hydrogen sulfide (H2S), or combinations thereof. The metal precursors in the alkali metal-doped first intermediate film are transformed, and an alkali metal-doped chalcogenide layer is formed.
    Type: Application
    Filed: February 21, 2013
    Publication date: June 12, 2014
    Inventors: Sean Vail, Gary Foley, Alexey Koposov
  • Patent number: 8685779
    Abstract: A method is provided for forming a Group VA-doped solution-processed metal chalcogenide. The method forms a first solution including a first material group, dissolved in solvent. A Group VA-containing material is added to the first solution. The Group VA-containing material may include arsenic (As), antimony (Sb), bismuth (Bi), or combinations thereof. The first solution is deposited on a conductive substrate, and a Group VA-doped first intermediate film is formed comprising metal precursors from corresponding members of the first material group. Thermal annealing is performed in an environment of selenium (Se), Se and hydrogen (H2), hydrogen selenide (H2Se), sulfur (S), S and H2, hydrogen sulfide (H2S), or combinations thereof. As a result, the metal precursors in the Group VA-doped first intermediate film are transformed, forming a Group VA-doped metal chalcogenide layer. In one aspect, an antimony-doped Cu—In—Ga—Se chalcogenide (CIGS) is formed.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: April 1, 2014
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Sean Vail, Alexey Koposov, Gary Foley
  • Patent number: 7015116
    Abstract: A shallow trench isolation (STI) structure in a semiconductor substrate and a method for forming the same are provided. A trench is formed in a semiconductor substrate. A first dielectric layer is formed on sidewalls of the trench. The first dielectric layer is formed thicker at a top portion of the sidewalls than a bottom portion of the sidewalls and leaving an entrance of the trench open to expose the trench. A second dielectric layer is conformally formed on the first dielectric layer to close the entrance, thus forming a void buried within the trench. Thus, the stress between the trench dielectric layer and the surrounding silicon substrate during thermal cycling can be substantially reduced.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: March 21, 2006
    Assignee: Integrated Device Technology, Inc.
    Inventors: Guo-Qiang (Patrick) Lo, Brian Schorr, Gary Foley, Shih-Ked Lee
  • Patent number: 6791155
    Abstract: A shallow trench isolation (STI) structure in a semiconductor substrate and a method for forming the same are provided. A trench is formed in a semiconductor substrate. A first dielectric layer is formed on sidewalls of the trench. The first dielectric layer is formed thicker at a top portion of the sidewalls than a bottom portion of the sidewalls and leaving an entrance of the trench open to expose the trench. A second dielectric layer is conformally formed on the first dielectric layer to close the entrance, thus forming a void buried within the trench. Thus, the stress between the trench dielectric layer and the surrounding silicon substrate during thermal cycling can be substantially reduced.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: September 14, 2004
    Assignee: Integrated Device Technology, Inc.
    Inventors: Guo-Qiang (Patrick) Lo, Brian Schorr, Gary Foley, Shih-Ked Lee