Abstract: Emulator performance can be improved by recognizing repeated sequences of the same instruction, or commonly groups of instructions. For example, it is very common to see a three instruction sequence of MOVEM, UNLK A6, and RTS instructions for a 68020 processor in procedure exit code. By looking for these sequences, and combining the operations performed by the separate sequences, overhead of decoding and dispatching the individual instructions in the sequence can be eliminated, and performance improved. Common instruction sequences or repeated sequences in a guest program are detected during emulation of the guest program on a host processor, and performance of the emulation optimized based on the detected sequences.

Abstract: A system for decoding guest instructions includes an emulation routine store in host processor addressable memory having a set of emulation programs beginning at corresponding emulation program addresses. A sequence of guest instructions is stored in the host processor addressable memory, and logic is provided which retrieves a current guest instruction in the sequence and jumps directly to an emulation program address in response to the current guest instruction. The emulation routine store is optimized by dividing it into a dispatch table having a set of dispatch entries and an emulation routine store storing a set of emulation entries. Each dispatch entry includes a plurality of host instructions of the emulation program corresponding to a particular guest instruction. The plurality of host instructions in a dispatch entry includes a host jump instruction which causes a jump to an emulation entry.