Abstract: A device that produces spin waves includes a base substrate, a transducer that includes a first plane defined by a first magnetic film and a second plane defined by a plurality of metal strips, and a second magnetic film having a spin-wave phase velocity lower than the first magnetic film. The second magnetic film is adjacent to the first magnetic film, and the first plane and the second plane are parallel. The plurality of metal strips are configured to receive a first signal, such that the first signal excites a first spin wave in the first magnetic film. The second magnetic film is configured to produce a second spin wave having a wavelength shorter than the first spin wave.

Abstract: First, second, and third integrated devices each include one or more interconnecting structure. Each interconnecting structure includes (i) one or more interconnecting nodules extending from an edge surface of the device, (ii) one or more interconnect voids formed in an edge surface of the device, or (iii) both (i) and (ii). The one or more interconnecting structures on each of the first and second device is mated with the one or more interconnecting structures on the second device. The first integrated device includes a signal output, the third integrated device includes a signal input; and the second integrated device includes a conductor for conducting a signal from the signal output to the signal input.

Abstract: First and second integrated devices each have an optical component and a plurality of interconnect structures disposed one edge thereon. The first edge surface of the second integrated device is positioned contiguous to the first edge surface of the first integrated device. The interconnect structures disposed on the first integrated device are in physical contact with the interconnect structures disposed on the edge surface of the second integrated device so as to provide alignment for conveying at least one signal between the optical components on the first and second integrated devices.

Abstract: First, second, and third integrated devices each include one or more interconnecting structure. Each interconnecting structure includes (i) one or more interconnecting nodules extending from an edge surface of the device, (ii) one or more interconnect voids formed in an edge surface of the device, or (iii) both (i) and (ii). The one or more interconnecting structures on each of the first and second device is mated with the one or more interconnecting structures on the second device. The first integrated device includes a signal output, the third integrated device includes a signal input; and the second integrated device includes a conductor for conducting a signal from the signal output to the signal input.

Abstract: First and second integrated devices each have an optical component and a plurality of interconnect structures disposed one edge thereon. The first edge surface of the second integrated device is positioned contiguous to the first edge surface of the first integrated device. The interconnect structures disposed on the first integrated device are in physical contact with the interconnect structures disposed on the edge surface of the second integrated device so as to provide alignment for conveying at least one signal between the optical components on the first and second integrated devices.

Abstract: A quilt packaging system includes a first and second electronic device each comprising a plurality of edge surfaces at least a first edge surface of which comprises one or more interconnect modules disposed thereon. The first edge surface of the second electronic device is positioned contiguous to the first edge surface of the first electronic device, and at least one of the one or more interconnect nodules disposed on the first edge surface of the first electronic device is configured to be in physical contact with at least one of the one or more interconnect nodules disposed on the first edge surface of second electronic device so as to provide an electrical connection between the first and second electronic devices at the first edge surfaces of the first and second electronic device.

Abstract: First and second integrated devices each have an optical component and a plurality of interconnect structures disposed one edge thereon. The first edge surface of the second integrated device is positioned contiguous to the first edge surface of the first integrated device. The interconnect structures disposed on the first integrated device are in physical contact with the interconnect structures disposed on the edge surface of the second integrated device so as to provide alignment for conveying at least one signal between the optical components on the first and second integrated devices.

Abstract: Nanoscale thermocouples are made of a single material and are shape-engineered to contain one or more variations in their width along their length. The mono-metallic nanowire junctions resulting from the width variation(s) exploit a difference in the Seebeck coefficient that is present at these size scales. Such devices have a wide variety of uses and can be coupled with an antenna in order to serve as an infrared detector.

Abstract: Nanoscale thermocouples are made of a single material and are shape-engineered to contain one or more variations in their width along their length. The mono-metallic nanowire junctions resulting from the width variation(s) exploit a difference in the Seebeck coefficient that is present at these size scales. Such devices have a wide variety of uses and can be coupled with an antenna in order to serve as an infrared detector.

Abstract: The present invention provides a quilt packaging system for microchip, a method for making such a quilt packaging system, microchips that may be used in a such a quilt packaging system, and methods for making such microchips.

Abstract: A non-majority magnetic logic gate device for use in constructing compact and power efficient logical magnetic arrays is presented. The non-majority magnetic logic gate device includes a substrate, symmetrically aligned magnetic islands (SAMIs), at least one misaligned magnetic island (MAMI), magnetic field inputs (MFIs), and at least one magnetic field output (MFO). The SAMIs and MAMI are electrically isolated from each other but are magnetically coupled to one another through their respective magnetic fringe fields. The MAMI is geometrically and/or angularly configured to exhibit a magnetization ground state bias which is dependent upon which direction the applied magnetic clock field is swept. Non-majority logic gates can be made from layouts containing the SAMIs and the MAMI which contain a smaller number of components as comparable majority logic gate layouts.

Abstract: The present invention provides a quilt packaging system for microchip, a method for making such a quilt packaging system, microchips that may be used in a such a quilt packaging system, and methods for making such microchips.

Abstract: A non-majority magnetic logic gate device for use in constructing compact and power efficient logical magnetic arrays is presented. The non-majority magnetic logic gate device includes a substrate, symmetrically aligned magnetic islands (SAMIs), at least one misaligned magnetic island (MAMI), magnetic field inputs (MFIs), and at least one magnetic field output (MFO). The SAMIs and MAMI are electrically isolated from each other but are magnetically coupled to one another through their respective magnetic fringe fields. The MAMI is geometrically and/or angularly configured to exhibit a magnetization ground state bias which is dependent upon which direction the applied magnetic clock field is swept. Non-majority logic gates can be made from layouts containing the SAMIs and the MAMI which contain a smaller number of components as comparable majority logic gate layouts.

Abstract: The present invention provides a quilt packaging system for microchip, a method for making such a quilt packaging system, microchips that may be used in a such a quilt packaging system, and methods for making such microchips.

Abstract: The present invention provides a quilt packaging system for microchip, a method for making such a quilt packaging system, microchips that may be used in a such a quilt packaging system, and methods for making such microchips.

Abstract: Micromachined extrusions on the micrometer scale is realized using compressive stresses resulting from electromigration-induced mass transport in planarized conductors. Extrusions are formed through simple die patterns etched through a passivation layer overlaying the conductors.

Abstract: It has been discovered that the use of a substantially free-standing voice coil within a lancing device in coordination and combination with a stationary magnet and electronic circuit renders a much improved lancing device. The minimal weight of the free standing voice coil and the attractive forces of the magnet allow the battery-powered electronic circuit to maintain excellent control over the advancement and retraction of a lancet. When the electronic lancing device is initiated by a user, the voltage source within the electronic lancing device provides sufficient current through the voice coil such that the coil and lancet are repulsed from the magnet and propelled into the puncture site.

Abstract: A quantum diffraction field effect transistor ("QUADFET"), a new class of semiconductors which exploits the phenomenon of electron diffraction to produce novel circuit characteristics.