Patents by Inventor Gary H. Yamashita

Gary H. Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Insulation and reinforcement of individual bonding wires in integrated circuit packages
    Patent number: 7202109
    Abstract: In an integrated circuit package, a method for insulation and reinforcement of individual bonding wires in an integrated circuit package. Using an airbrush, bonding wires are sprayed and coated with an insulating material prior to the molding process. Mold flow induced short rejects are eliminated as a result of: (a) Electrically insulating the bonding wires by coating them with an insulating mixture; (b) Physically isolating the bonding wires as a result of bead formation around individual bonding wires, with the insulating beads acting as contact barriers between the bonding wires; and (c) Enhancing the structural rigidity of the bonding wires as a result of the coating. Reinforcement and separation of bonding wires also reduces inductive coupling and/or crosstalk interference due to proximity of bonding wires.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: April 10, 2007
    Assignee: National Semiconductor Corporation
    Inventors: David Zakharian, Gary H. Yamashita, Gary M. Broussard