Abstract: A custom connector kit for connecting 2 flexible ducts together includes a connector device. The connector device is configured to connect two flexible ducts together. The connector device includes a first male connection end and a second male connection end. The first male connection end is at a first distal end of the connector device. The first male connection end is configured to be connected to a first flexible duct. The first male connection end includes a first diameter sized to fit securely inside of the first flexible duct. The second male connection end is at a second distal end of the connector device. The second male connection end is configured to be connected to a second flexible duct. The second male connection end includes a second diameter sized to fit securely inside of the second flexible duct.

Abstract: The present invention provides a standing mobility and/or transfer device for handicapped users including an articulating foot platform system effective to move a foot platform between a rearwardly tilted user-receiving condition located close to the floor and an elevated, forwardly tilted condition for user transport at a standing-prone angle. Bilateral lift arms move in concert with the raising and lowering function of the foot platform to elevate the person to a standing-prone position from a seated position. In a raised position, the lift arms are located alongside a user to provide additional posture control. Optional motors associated with one or more wheels of the device may be controlled by the user with a joystick for self-propelled standing mobility.

Abstract: A tank or bed has a plurality of sidewalls that create a bed cavity and a Fresnel panel frame that includes at least one Fresnel panel. The Fresnel panel frame may be adjacent to the bed cavity and may cover at least a portion of the bed cavity. An amount of sludge may be contained within the bed cavity. When placed in sunlight, the heat enhanced by the Fresnel panels may heat the sludge sufficiently for the sludge to be used as fertilizer.

Abstract: A method of treating sludge using solar energy is provided. The present invention utilizes a Fresnel panel frame that includes at least one Fresnel panel. The Fresnel panel may cover at least a portion of a bed cavity. An amount of waste may be placed within the bed cavity. When placed in sunlight, the heat enhanced by the Fresnel panels may heat the waste sufficiently for safe easy disposal, recycling, or for the creation of fertilizer.

Abstract: A tank, tube chamber, or bed having a plurality of sidewalls that creates a bed cavity. A Fresnel panel frame that includes at least one Fresnel panel may be adjacent to the bed cavity and may cover at least a portion of the bed cavity. An amount of waste may be contained within the bed cavity. When placed in sunlight, the heat enhanced by the Fresnel panels may heat the waste sufficiently for safe easy disposal, recycling, or for the creation of fertilizer.

Abstract: A tank or bed has a plurality of sidewalls that create a bed cavity and a Fresnel panel frame that includes at least one Fresnel panel. The Fresnel panel frame may be adjacent to the bed cavity and may cover at least a portion of the bed cavity. An amount of sludge may be contained within the bed cavity. When placed in sunlight, the heat enhanced by the Fresnel panels may heat the sludge sufficiently for the sludge to be used as fertilizer.

Abstract: The present invention provides a standing mobility and/or transfer device for handicapped users including an articulating foot platform system effective to move a foot platform between a rearwardly tilted user-receiving condition located close to the floor and an elevated, forwardly tilted condition for user transport at a standing-prone angle. Bilateral lift arms move in concert with the raising and lowering function of the foot platform to elevate the person to a standing-prone position from a seated position. In a raised position, the lift arms are located alongside a user to provide additional posture control. Optional motors associated with one or more wheels of the device may be controlled by the user with a joystick for self-propelled standing mobility.

Abstract: A method and apparatus for providing a source operand for an instruction to be executed in a processor. Some embodiments may include a register file unit that has registers and a scheduler to schedule instructions. In some embodiments, the scheduler is to asynchronously receive an instruction and a source operand for that instruction, the source operand being received from the register file unit.

Abstract: A method for managing virtual memory addresses includes associating a guest identifier (ID) with a virtual machine accessing a virtual memory address. A physical memory address is retrieved corresponding to the virtual memory address utilizing the guest ID. Other embodiments are described and claimed.

Abstract: According to one embodiment, a method is disclosed. The method includes determining whether the temperature of a central processing unit (CPU) exceeds a predetermined threshold. In addition, the method includes generating a first interrupt if the temperature of the CPU exceeds the predetermined threshold and transitioning from a first execution mode to a second execution mode.

Abstract: A method for managing virtual memory addresses includes associating a guest identifier (ID) with a virtual machine accessing a virtual memory address. A physical memory address is retrieved corresponding to the virtual memory address utilizing the guest ID. Other embodiments are described and claimed.

Abstract: In one embodiment, the present invention includes a method of intercepting a guest software execution of a translation insertion operation, and performing the translation insertion operation using host software. For example, the host software may obtain a requested translation from a guest virtual address to a host physical address and provide it to memory management unit resources. Other embodiments are described and claimed.

Abstract: Various methods, apparatuses, and systems in which a processor includes an issue engine and an in-order execution pipeline. The issue engine categorizes operations as at least one of either a speculative operation which perform computations or an architectural operation which has potential to fault or cause an exception. Each architectural operation issues with an associated architectural micro-operation. A first micro-operation checks whether a first speculative operation is dependent upon an intervening first architectural operation. The in-order execution pipeline executes the speculative operation, the architectural operation, and the associated architectural micro-operations.

Abstract: Various methods, apparatuses, and systems in which a processor includes an issue engine and an in-order execution pipeline. The issue engine categorizes operations as at least one of either a speculative operation which perform computations or an architectural operation which has potential to fault or cause an exception. Each architectural operation issues with an associated architectural micro-operation. A first micro-operation checks whether a first speculative operation is dependent upon an intervening first architectural operation. The in-order execution pipeline executes the speculative operation, the architectural operation, and the associated architectural micro-operations.

Abstract: Various methods, apparatuses, and systems in which a processor includes an issue engine and an in-order execution pipeline. The issue engine categorizes operations as at least one of either a speculative operation which perform computations or an architectural operation which has potential to fault or cause an exception. Each architectural operation issues with an associated architectural micro-operation. A first micro-operation checks whether a first speculative operation is dependent upon an intervening first architectural operation. The in-order execution pipeline executes the speculative operation, the architectural operation, and the associated architectural micro-operations.

Abstract: Embodiments of apparatuses and methods for improving performance in a virtualization architecture are disclosed. In one embodiment, an apparatus includes a processor and a processor abstraction layer. The processor abstraction layer includes instructions that, when executed by the processor, support techniques to improve the performance of the apparatus in a virtualization architecture.

Abstract: A method and apparatus for providing a source operand for an instruction to be executed in a processor. Some embodiments may include a register file unit that has registers and a scheduler to schedule instructions. In some embodiments, the scheduler is to asynchronously receive an instruction and a source operand for that instruction, the source operand being received from the register file unit.

Abstract: A cooking oil filter element and method are characterized by a filter media having a needled nylon pre-filter media layer and a melt-blown nylon main filter layer. The filter media is pleated and configured in a cylindrical shape, and end caps are attached to the ends of the cylindrical filter media through use of an interlock structure that provides, in addition to an adhesive bond, a mechanical interlock between the end cap and the adhesive.

Abstract: Embodiments include a system for minimizing storage space required for tracking load instructions through a pipeline in a processor. Store instructions are tracked in a separate queue and only load instructions that require speculation on data or addresses are tracked in a load table and flagged in the reorder buffer. This system improves system performance by reducing energy and space requirements.

Abstract: A method and an apparatus to implement a flexible mechanism for enforcing coherency among caching structures have been disclosed. In one embodiment, the apparatus includes a translation-lookaside-buffer (TLB), a cache to provide temporary storage for a data block, and a memory management unit to implement a first cache-coherency mechanism if the processor is in a first mode and to implement a second cache-coherency mechanism if the processor is in a second mode. Other embodiments are described and claimed.