Abstract: An output matching network comprising a plurality of impedance matching circuits. The inputs of each of the plurality of impedance matching circuits are connected to a first input of the output matching network. The outputs of each of the plurality of impedance matching circuits are connected to a plurality of first outputs of the output matching network. One of the plurality of impedance matching circuits is active at a given time. The active impedance matching circuit of the plurality of impedance matching circuits exhibits a first input impendence at a first frequency band. Each inactive impedance matching circuit of the plurality of impedance matching circuits exhibits a second input impedance at the first frequency band. The second input impendence is at least 10 times greater than the first input impendence.

Abstract: A low leakage logic circuit. The low leakage logic circuit includes a control circuit for logic circuit. The control circuit has a first transistor, a second transistor, a third transistor, a first diode, a first resistor and a second resistor. When the control circuit is ON, a first circuit path in the logic circuit is supplied with a first voltage from the source terminal of the third transistor. This voltage acts as a logic output and has the ability to source current at output terminal of the logic circuit. When the control circuit is OFF, a second circuit path in the logic circuit is supplied with a second voltage from the control circuit which is lower than the turn-on voltage of the second circuit path. This voltage is insufficient to turn ON the logic circuit, hence no current flows into the logic circuit.

Abstract: A multi-mode RF power amplifier circuit that operates under dynamic power supply conditions. The power amplifier circuit operates under a high power mode and a low power mode. The multi-mode RF power amplifier includes a low power path and a high power path. Under the high power mode of operation, the high power path becomes active and the low power path becomes inactive. Each of the low power path and the high power path includes impedance matching networks and power amplifiers. Under either mode of operation, an inactive path will present at least five times higher input impedance than that of an active path. An impedance matching network connected between output terminals of the high power path and the low power path provides isolation between the output terminals of the high power path and the low power path.

Abstract: A power amplifier having a driver stage and an output stage is configured to provide an amplified RF input signal. The driver stage of the power amplifier consists of one or more driver circuits consisting of a network of transistors, current sources, capacitive elements and resistive elements. An RF input signal is fed into the driver stage which is configured to provide a dynamic DC bias and an RF signal gain to a base terminal of a Bipolar Junction Transistor (BJT) power device present in the output stage. The output stage includes of a network of transistors, capacitive and resistive elements and when driven by the DC bias and the RF signal from the driver stage produces an amplified RF input signal at an output side of the output stage.

Abstract: A multi-mode RF amplifier is described having at least a higher and a lower power path coupling an input to an output. At a pre-selected output power level, the higher power path is enabled while the lower power path is disabled when more output power is required. The process is reversed when less power is needed. The present invention matches the power gain variation over temperature characteristic of each path such that, especially at the cross over point, the gain delta (the difference in power gain between the two paths) has minimal variation over temperature. Such power gain characteristic is required for meeting the test requirements, specifically the inner loop power control, for third generation (3G) cellular handsets.

Abstract: A multi-mode RF amplifier is disclosed having high and low output power modes composed of two power paths. When the multi-mode RF amplifier is biased into the high power, HP, mode, substantial power is delivered via both (first and second) paths. While in the low power, LP, mode, power is delivered via second path only which is designed to reduce current consumption and improve efficiency under low power (backoff) operation. The multi-mode RF amplifier has power amplifiers in one embodiment, but no mechanical or electronic switches. The multi-mode amplifier utilizes impedance matching circuits where the impedances change under different power amplifier bias conditions in order to optimize current consumption under both modes of operations and is power efficient for portable applications. Note that, in a preferred embodiment, even in the HP mode more power is delivered to the second power path than to the first power path.

Abstract: A multi-mode RF amplifier is disclosed having high and low output power modes and two power paths. A first RF amplifier delivers power to both paths. When the multi-mode RF amplifier is biased into the high power, HP, mode, substantial power is delivered via both (first and second) paths. While in the low power, LP, mode, an RF switch is turned off, creating a high input impedance, open circuit for the first path, and effectively isolating the two paths. Therefore, power is delivered by the first RF amplifier to the second path only. The impedance presented to the output of the first RF amplifier is equal to the input impedance of the second path which may be optimally set for maximizing power added efficiency or output power in LP mode. Note that, in a preferred embodiment, even in the HP mode more power is delivered to the second power path than to the first power path.

Abstract: A two-(or multi)stage power amplifier receives a variable RF input signal, and outputs an optimized. RF output signal from, for example, a mobile handset. The output power level from the handset is predetermined, as known in the art, by the received control signal from a base station. The first power amplifier stage amplifies the variable RF input signal and outputs an RF signal, Vin, to a power detector circuit and an RF signal to the second or next amplifier stage. The power detect circuit amplifies the Vin signal and rectifies that signal with a linearly biased diode and provides a detect signal to a DC to DC converter. The converter responds by providing an optimum voltage bias, which is linearly related to the DC voltage detect signal from the power detector, to the output stage, and, if desired, to the first and/or other stages of the power amplifier that optimizes the output power level while meeting the required linearity specification.

Abstract: A multi-mode RF amplifier is described having at least a higher and a lower power path coupling an input to an output. At a pre-selected output power level, the higher power path is enabled while the lower power path is disabled when more output power is required. The process is reversed when less power is needed. The present invention matches the power gain variation over temperature characteristic of each path such that, especially at the cross over point, the gain delta (the difference in power gain between the two paths) has minimal variation over temperature. Such power gain characteristic is required for meeting the test requirements, specifically the inner loop power control, for third generation (3G) cellular handsets.

Abstract: A multi-mode RF amplifier is disclosed having high and low output power modes and two power paths. A first RF amplifier delivers power to both paths. When the multi-mode RF amplifier is biased into the high power, HP, mode, substantial power is delivered via both (first and second) paths. While in the low power, LP, mode, an RF switch is turned off, creating a high input impedance, open circuit for the first path, and effectively isolating the two paths. Therefore, power is delivered by the first RF amplifier to the second path only. The impedance presented to the output of the first RF amplifier is equal to the input impedance of the second path which may be optimally set for maximizing power added efficiency or output power in LP mode. Note that, in a preferred embodiment, even in the HP mode more power is delivered to the second power path than to the first power path.

Abstract: A multi-mode RF amplifier is disclosed having high and low output power modes composed of two power paths. When the multi-mode RF amplifier is biased into the high power, HP, mode, substantial power is delivered via both (first and second) paths. While in the low power, LP, mode, power is delivered via second path only which is designed to reduce current consumption and improve efficiency under low power (backoff) operation. The multi-mode RF amplifier has power amplifiers in one embodiment, but no mechanical or electronic switches. The multi-mode amplifier utilizes impedance matching circuits where the impedances change under different power amplifier bias conditions in order to optimize current consumption under both modes of operations and is power efficient for portable applications. Note that, in a preferred embodiment, even in the HP mode more power is delivered to the second power path than to the first power path.

Abstract: A two- (or multi) stage power amplifier receives a variable RF input signal, and outputs an optimized. RF output signal from, for example, a mobile handset. The output power level from the handset is predetermined, as known in the art, by the received control signal from a base station. The first power amplifier stage amplifies the variable RF input signal and outputs an RF signal, Vin, to a power detector circuit and an RF signal to the second or next amplifier stage. The power detect circuit amplifies the Vin signal and rectifies that signal with a linearly biased diode and provides a detect signal to a DC to DC converter. The converter responds by providing an optimum voltage bias, which is linearly related to the DC voltage detect signal from the power detector, to the output stage, and, if desired, to the first and/or other stages of the power amplifier that optimizes the output power level while meeting the required linearity specification.

Abstract: A power amplifier includes an input network, output stages, coupled in parallel and configured to output power optimally in corresponding power-ranges, the output stages coupled to the input network, an output impedance matching network, coupled to the output stages and not containing a switching element, and a bias-control network, coupled between the output impedance matching network, the input network, and the output stages. In some amplifiers the output impedance matching network does not contain a switching element corresponding to the output stage configured to output power in the highest range. In other amplifiers the bias-control network is configured to isolate output stages by providing a hard shut-off to transistors of the isolated output stages.

Abstract: A power amplifier includes an input network, output stages, coupled in parallel and configured to output power optimally in corresponding power-ranges, the output stages coupled to the input network, an output impedance matching network, coupled to the output stages and not containing a switching element, and a bias-control network, coupled between the output impedance matching network, the input network, and the output stages. In some amplifiers the output impedance matching network does not contain a switching element corresponding to the output stage configured to output power in the highest range. In other amplifiers the bias-control network is configured to isolate output stages by providing a hard shut-off to transistors of the isolated output stages.

Abstract: In a predistortion type linearizer including a FET, an input matching circuit connected to the drain of the FET for receiving an input signal, an output matching circuit connected to the source of said the FET for outputting an output signal, and a inductor having a first terminal connected to the gate of the FET and a second terminal for receiving a first control voltage, a variable impedance circuit is connected to the second terminal of the inductor, and the impedance of the variable impedance circuit is adjusted by a second control voltage.

Abstract: In a predistortion type linearizer including a FET, an input matching circuit connected to the drain of the FET for receiving an input signal, an output matching circuit connected to the source of said the FET for outputting an output signal, and a inductor having a first terminal connected to the gate of the 1 FET and a second terminal for receiving a first control voltage, a variable impedance circuit is connected to the second terminal of the inductor, and the impedance of the variable impedance circuit is adjusted by a second control voltage.

Abstract: A linear power amplifier includes a driver stage, employing an active feedforward-type predistorter, connected in cascade with a final power stage. The active feedforward-type predistorter has an amplifier with a predistorter connecting between its input and output. This driver stage has opposite gain and phase characteristics to that of the final power stage and is used to predistort an input signal. When combined with the final power stage, the nonlinear gain and phase of the power stage are compensated and linearized by the driver stage, resulting in a linear power amplifier with low distortion amplification and high efficiency operation.

Abstract: The present invention provides a linear power amplifier consists of a driver stage, employing an active feedforward-type predistorter, connected in cascade with a final power stage. The active feedforward-type predistorter consists of an amplifier with a predistorter connecting between its input and output. This driver stage has opposite gain and phase characteristics to that of the final power stage and is used to predistort an input signal. When combined with the final power stage, the nonlinear gain and phase of the power stage are compensated and linearized by the driver stage, resulting in a linear power amplifier with low distortion amplification and high efficiency operation.

Abstract: This invention relates to an electronic circuit (predistortion type linearizer) for linearizing the nonlinear responses of amplifiers, to achieve low distortion, wide-dynamic range amplification particularly suitable for cellular handsets application.