Patents by Inventor Gary Hicok

Gary Hicok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190303759
    Abstract: In various examples, physical sensor data may be generated by a vehicle in a real-world environment. The physical sensor data may be used to train deep neural networks (DNNs). The DNNs may then be tested in a simulated environment—in some examples using hardware configured for installation in a vehicle to execute an autonomous driving software stack—to control a virtual vehicle in the simulated environment or to otherwise test, verify, or validate the outputs of the DNNs. Prior to use by the DNNs, virtual sensor data generated by virtual sensors within the simulated environment may be encoded to a format consistent with the format of the physical sensor data generated by the vehicle.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 3, 2019
    Inventors: Clement Farabet, John Zedlewski, Zachary Taylor, Greg Heinrich, Claire Delaunay, Mark Daly, Matthew Campbell, Curtis Beeson, Gary Hicok, Michael Cox, Rev Lebaredian, Tony Tamasi, David Auld
  • Publication number: 20190265703
    Abstract: A system and method for an on-demand shuttle, bus, or taxi service able to operate on private and public roads provides situational awareness and confidence displays. The shuttle may include ISO 26262 Level 4 or Level 5 functionality and can vary the route dynamically on-demand, and/or follow a predefined route or virtual rail. The shuttle is able to stop at any predetermined station along the route. The system allows passengers to request rides and interact with the system via a variety of interfaces, including without limitation a mobile device, desktop computer, or kiosks. Each shuttle preferably includes an in-vehicle controller, which preferably is an AI Supercomputer designed and optimized for autonomous vehicle functionality, with computer vision, deep learning, and real time ray tracing accelerators. An AI Dispatcher performs AI simulations to optimize system performance according to operator-specified system parameters.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 29, 2019
    Inventors: Gary HICOK, Michael COX, Miguel SAINZ, Martin HEMPEL, Ratin KUMAR, Timo ROMAN, Gordon GRIGOR, David NISTER, Justin EBERT, Chin SHIH, Tony TAM, Ruchi BHARGAVA
  • Publication number: 20190258251
    Abstract: Autonomous driving is one of the world's most challenging computational problems. Very large amounts of data from cameras, RADARs, LIDARs, and HD-Maps must be processed to generate commands to control the car safely and comfortably in real-time. This challenging task requires a dedicated supercomputer that is energy-efficient and low-power, complex high-performance software, and breakthroughs in deep learning AI algorithms. To meet this task, the present technology provides advanced systems and methods that facilitate autonomous driving functionality, including a platform for autonomous driving Levels 3, 4, and/or 5. In preferred embodiments, the technology provides an end-to-end platform with a flexible architecture, including an architecture for autonomous vehicles that leverages computer vision and known ADAS techniques, providing diversity and redundancy, and meeting functional safety standards.
    Type: Application
    Filed: November 9, 2018
    Publication date: August 22, 2019
    Inventors: Michael Alan DITTY, Gary HICOK, Jonathan SWEEDLER, Clement FARABET, Mohammed Abdulla YOUSUF, Tai-Yuen CHAN, Ram GANAPATHI, Ashok SRINIVASAN, Michael Rod TRUOG, Karl GREB, John George MATHIESON, David Nister, Kevin Flory, Daniel Perrin, Dan Hettena
  • Publication number: 20080071926
    Abstract: A novel network architecture that integrates the functions of an internet protocol (IP) router into a network processing unit (NPU) that resides in a host computer's chipset such that the host computer's resources are perceived as separate network appliances. The NPU appears logically separate from the host computer even though, in one embodiment, it is sharing the same chip.
    Type: Application
    Filed: November 30, 2007
    Publication date: March 20, 2008
    Inventors: Gary Hicok, Robert Alfieri
  • Publication number: 20050190190
    Abstract: A bridge associated with a broadcast aperture facilitates the transfer of rendering commands and data between a processor and multiple graphics devices. The bridge receives data written by the processor to the broadcast aperture and forwards it to multiple graphics devices, eliminating the need for the processor to perform duplicative(?) write operations. During system initialization, a broadcast aperture is allocated to the bridge in address space based on an aperture size value set using a system configuration utility and stored in system configuration memory. A graphics driver activates the broadcast aperture by sending unicast aperture parameters associated with the multiple graphics devices to the bridge via a bridge driver. Upon activating the broadcast aperture, multiple graphics devices can be operated in parallel to improve rendering performance. Parallel rendering techniques include split-frame, alternate frame, and combined split- and alternate frame rendering.
    Type: Application
    Filed: February 27, 2004
    Publication date: September 1, 2005
    Applicant: NVIDIA Corporation
    Inventors: Franck Diard, David Reed, Gary Hicok, Michael Cox
  • Patent number: 5903773
    Abstract: A system for trapping I/O instructions. The system is comprised of at least one peripheral controller for receiving a plurality of I/O instructions and for initiating trapping of an un-executable I/O instruction by issuing a target abort signal when the peripheral controller senses a power off condition in a peripheral device. A system controller is coupled to the at least one peripheral controller for receiving the target abort signal from the at least one peripheral controller and for sequentially: issuing a system management interrupt (SMI) signal; counting a predetermined time period to allow recognition of the SMI signal; and issuing a cycle completion signal after counting the predetermined time period. A CPU is coupled to the system controller for issuing a plurality of I/O instructions and for receiving the SMI signal and the cycle completion signal from the system controller.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: May 11, 1999
    Assignee: VLSI Technology, Inc.
    Inventors: Nicholas Julian Richardson, Barry Davis, Gary Hicok
  • Patent number: 5751235
    Abstract: A joystick system is designed to provide a modified digital representation of the setting of a joystick potentiometer. The system operates to compensate for non-linearities and offsets in the joystick response, or may be used to enhance or vary the joystick response to a non-linear form. This is accomplished by supplying the output voltage of the joystick to an analog-to-digital converter, the output of which then is supplied to a lookup table. The lookup table output is provided to a counter. In one mode of operation, the counter counts down to zero at some multiple of a sample rate. When the counter reaches a zero count, the time interval representative of the joystick position is indicated; and the corrected or enhanced position is indicated by this output.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: May 12, 1998
    Assignee: VLSI Technology
    Inventors: Gary Hicok, Kenneth Potts, Scott Harrow
  • Patent number: 5742249
    Abstract: A system is provided for digitizing the setting of a potentiometer of the type used in an analog joystick for computer games. The analog output of the potentiometer is applied to one of two inputs of a voltage comparator. When a readout of the joystick position is desired, a "write" input is applied to a counter to permit it to commence counting at a predetermined frequency from an initial or zero count. The digital outputs of the counter are coupled to the inputs of a digital-to-analog converter, the output of which is coupled to the second input of the voltage comparator. When the count in the counter produces a voltage at the output of the digital-to-analog converter corresponding to the voltage setting of the potentiometer, the comparator provides an output signal. The time delay from the time the write pulse occurs until this signal is obtained is representative of the potentiometer setting.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: April 21, 1998
    Assignee: VLSI Technology, Inc.
    Inventors: Gary Hicok, Kenneth Potts, Scott Harrow
  • Patent number: 5710575
    Abstract: A joystick system provides a digital representation of the setting of a joystick potentiometer. The voltage of the joystick is supplied to an analog-to-digital converter, the output of which then is used to load a counter. In one mode of operation, the counter counts down to zero at some multiple of the sample rate. When the counter reaches zero, the time interval representative of the joystick position is indicated; and this output is indicative of the joystick position. In an alternative mode of operation, the counter is used as a data latch and the joystick position is digitally read from the counter, which keeps the data latched until the next sample cycle from the joystick position.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: January 20, 1998
    Assignee: VLSI Technology, Inc.
    Inventors: Gary Hicok, Kenneth Potts, Scott Harrow