Patents by Inventor Gary I. Paek

Gary I. Paek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7084354
    Abstract: An electronic assembly is disclosed. The electronic assembly includes a lower portion and a first elongate trace formed on an upper surface of the lower portion. The trace is covered by an upper portion, and an opening formed through an upper surface of the upper portion extends to the trace to expose a portion of the trace. A second elongate trace is formed on the upper portion. A portion of the second elongate trace positioned in the opening formed through the upper surface of the upper portion contacts the first elongate trace through the opening to form an electrical interconnection between the first trace and the second trace.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: August 1, 2006
    Assignee: Intel Corporation
    Inventors: David W. Boggs, Daryl A. Sato, John H. Dungan, Gary I. Paek
  • Publication number: 20040231886
    Abstract: An apparatus and method for providing a vented blind via in pad of a printed circuit board (PCB). A vent in the blind via in pad to allow gases formed during reflow soldering to escape from the solder joint. In one embodiment, the vent extends from the outer edge of the pad to the blind via. In another embodiment, a method includes forming a blind via in pad having a vent.
    Type: Application
    Filed: June 17, 2004
    Publication date: November 25, 2004
    Inventors: David W. Boggs, John H. Dungan, Gary I. Paek, Daryl A. Sato
  • Patent number: 6787443
    Abstract: An apparatus and method for providing a vented blind via in pad of a printed circuit board (PCB). A vent in the blind via in pad to allow gases formed during reflow soldering to escape from the solder joint. In one embodiment, the vent extends from the outer edge of the pad to the blind via. In another embodiment, a method includes forming a blind via in pad having a vent.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: September 7, 2004
    Assignee: Intel Corporation
    Inventors: David W. Boggs, John H. Dungan, Gary I. Paek, Daryl A. Sato
  • Publication number: 20030231474
    Abstract: An electronic assembly is disclosed. The electronic assembly includes a lower portion and a first elongate trace formed on an upper surface of the lower portion. The trace is covered by an upper portion, and an opening formed through an upper surface of the upper portion extends to the trace to expose a portion of the trace. A second elongate trace is formed on the upper portion. A portion of the second elongate trace positioned in the opening formed through the upper surface of the upper portion contacts the first elongate trace through the opening to form an electrical interconnection between the first trace and the second trace.
    Type: Application
    Filed: June 14, 2002
    Publication date: December 18, 2003
    Inventors: David W. Boggs, Daryl A. Sato, John H. Dungan, Gary I. Paek