Patents by Inventor Gary J. Pashby

Gary J. Pashby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5929498
    Abstract: A semiconductor device has a flexible structure bonded to a semiconductor substructure to form a cavity. The flexible structure is bonded over a conducting feed-through without the feed-through interfering with a hermetic seal formed by bonding. One embodiment of the device includes depressions that contain edges of a diffused feed-through so that imperfections at the edge of the diffusion do not interfere with bonding. The flexible structure is bonded to elevated areas thus hiding the imperfections. In one embodiment, a first elevated region is surrounded by a second elevated region, and diffusion for the feed-through extends from an active region in the cavity across the first elevated region with edges of the diffusion being between the first and second elevated regions. The flexible structure can thus bond to the first and second elevated regions without interference from the edge of the diffused feed-through.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: July 27, 1999
    Assignee: Kavlico Corporation
    Inventors: M. Salleh Ismail, Raffi M. Garabedian, Max E. Nielsen, Gary J. Pashby, Jeffrey K. K. Wong
  • Patent number: 5923952
    Abstract: A semiconductor device has a flexible structure bonded to a semiconductor substructure to form a cavity. The flexible structure is bonded over a conducting feed-through without the feed-through interfering with a hermetic seal formed by bonding. One embodiment of the device includes depressions that contain edges of a diffused feed-through so that imperfections at the edge of the diffusion do not interfere with bonding. The flexible structure is bonded to elevated areas thus hiding the imperfections. In one embodiment, a first elevated region is surrounded by a second elevated region, and diffusion for the feed-through extends from an active region in the cavity across the first elevated region with edges of the diffusion being between the first and second elevated regions. The flexible structure can thus bond to the first and second elevated regions without interference from the edge of the diffused feed-through.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: July 13, 1999
    Assignee: Kavlico Corporation
    Inventors: M. Salleh Ismail, Raffi M. Garabedian, Max E. Nielsen, Gary J. Pashby, Jeffrey K. K. Wong
  • Patent number: 5578843
    Abstract: Fabrication of semiconductor devices with movable structures includes local oxidation of a wafer and oxide removal to form a depression in an elevated bonding surface. A second wafer is fusion bonded to the elevated bonding surface and shaped to form a flexible membrane. An alternative fabrication technique forms a spacer having a depression on a first wafer and active regions on a second wafer, and fusion bonds the wafers together with the depression over the active regions. Devices formed are integrable with standard MOS devices and include FETs, capacitors, and sensors with movable membranes. An FET sensor has gate and drain coupled together and a drain-source voltage which depends on the gate's deflection. Selected operating current, channel length, and channel width provide a drain-source voltage linearly related to gate deflection.
    Type: Grant
    Filed: October 6, 1994
    Date of Patent: November 26, 1996
    Assignee: Kavlico Corporation
    Inventors: Raffi M. Garabedian, M. Salleh Ismail, Gary J. Pashby
  • Patent number: 5576251
    Abstract: Fabrication of semiconductor devices with movable structures includes local oxidation of a wafer and oxide removal to form a depression in an elevated bonding surface. A second wafer is fusion bonded to the elevated bonding surface and shaped to form a flexible membrane. An alternative fabrication technique forms a spacer having a depression on a first wafer and active regions on a second wafer, and fusion bonds the wafers together with the depression over the active regions. Devices formed are integrable with standard MOS devices and include FETs, capacitors, and sensors with movable membranes. An FET sensor has gate and drain coupled together and a drain-source voltage which depends on the gate's deflection. Selected operating current, channel length, and channel width provide a drain-source voltage linearly related to gate deflection.
    Type: Grant
    Filed: February 22, 1995
    Date of Patent: November 19, 1996
    Assignee: Kavlico Corp.
    Inventors: Raffi M. Garabedian, M. Salleh Ismail, Gary J. Pashby, Jeffrey K. K. Wong