Patents by Inventor Gary J. Sgrigonoli

Gary J. Sgrigonoli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4944006
    Abstract: A bit packet communication system includes a head-end having a software implemented 16 bit shift register with a plurality of feed-forward taps and a different plurality of feedback taps for simultaneously dividing and multiplying the input data bit packet to provide an output bit packet that is both encrypted and error protected. Dynamic encryption is provided by utilizing an initial preset for the software corresponding to a preset encryption key for the shift register. Authorized subscriber terminals are provided with memories and decryption keys are downloaded. The bit packets are assembled with a global bit packet encrypted with a global encryption key and subsequent individually addressed bit packets encrypted with address keys. The address keys and terminal addresses are permanently stored in the subscriber terminal memories. The global encryption keys are changed periodically.
    Type: Grant
    Filed: April 25, 1989
    Date of Patent: July 24, 1990
    Assignee: Zenith Electronics Corporation
    Inventors: Richard W. Citta, Paul M. Gosc, Dennis M. Mutzabaugh, Gary J. Sgrigonoli