Patents by Inventor Gary John Formica

Gary John Formica has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DIE POWER STRUCTURE
    Publication number: 20140009219
    Abstract: A die including a first set of power tiles arranged in a first array and having a first voltage; a second set of power tiles arranged in a second array offset from the first array and having a second voltage; a set of power mesh segments enclosed by the second set of power tiles and having the first voltage; a first power rail passing underneath the set of power mesh segments and the first set of power tiles; and a set of vias operatively connecting the power rail with the set of power mesh segments and the first plurality of power tiles.
    Type: Application
    Filed: September 10, 2013
    Publication date: January 9, 2014
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Aparna Ramachandran, Gary John Formica
  • Die power structure
    Patent number: 8547167
    Abstract: A die including a first set of power tiles arranged in a first array and having a first voltage; a second set of power tiles arranged in a second array offset from the first array and having a second voltage; a set of power mesh segments enclosed by the second set of power tiles and having the first voltage; a first power rail passing underneath the set of power mesh segments and the first set of power tiles; and a set of vias operatively connecting the power rail with the set of power mesh segments and the first plurality of power tiles.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: October 1, 2013
    Assignee: Oracle International Corporation
    Inventors: Aparna Ramachandran, Gary John Formica
  • Die power structure
    Patent number: 8368226
    Abstract: A die including a first set of power tiles arranged in a first array and having a first voltage; a second set of power tiles arranged in a second array offset from the first array and having a second voltage; a set of power mesh segments enclosed by the second set of power tiles and having the first voltage; a first power rail passing underneath the set of power mesh segments and the first set of power tiles; and a set of vias operatively connecting the power rail with the set of power mesh segments and the first plurality of power tiles.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: February 5, 2013
    Assignee: Oracle International Corporation
    Inventors: Aparna Ramachandran, Gary John Formica
  • DIE POWER STRUCTURE
    Publication number: 20120161856
    Abstract: A die including a first set of power tiles arranged in a first array and having a first voltage; a second set of power tiles arranged in a second array offset from the first array and having a second voltage; a set of power mesh segments enclosed by the second set of power tiles and having the first voltage; a first power rail passing underneath the set of power mesh segments and the first set of power tiles; and a set of vias operatively connecting the power rail with the set of power mesh segments and the first plurality of power tiles.
    Type: Application
    Filed: March 5, 2012
    Publication date: June 28, 2012
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Aparna Ramachandran, Gary John Formica