Abstract: The present invention provides a voltage regulator especially adaptable for use with a field-programmable gate array (FPGA). The voltage regulator of the present invention rapidly generates an operating voltage for the core or nucleus logic elements upon application of external power while preventing degradation of the fuses. The core or regulated voltage of a FPGA can be set to a level that provides maximum performance with minimum power consumption or, alternatively, permits propagation delays and switching rates to be adjusted so as to compensate for die to die variation. Since it is common for electrical parameters of FPGA manufactured in different wafer fabrication facilities to vary, the voltage regulator is configurable as a true voltage regulator or, alternatively, as a pseudo-voltage regulator. The voltage regulator comprises an operational transconductance amplifier with a single gain stage followed by an NMOS source follower.

Abstract: A bandgap generator including an MOS current mirror, first and second bipolar transistors and an MOS transistor pair operating in saturation. Cascode transistors interconnect the saturation transistor pair and the MOS transistor pair. A bias resistor interconnects the one of the cascode transistors and one transistor of the MOS current mirror.

Abstract: A voltage regulator especially adaptable for use with field-programmable gate arrays (FPGAs). The voltage regulator includes a frequency compensated differential amplifier, a configurable feedback network for setting the gain of the voltage regulator, and a plurality of source follower devices for driving the feedback network and providing a regulated supply voltage. A bandgap generator may also be provided for generating a reference bias voltage that is independent of temperature.

Abstract: A voltage regulator especially adaptable for use with field-programmable gate arrays (FPGA). The voltage regulator is configurable as a true voltage regulator or, alternatively, as a pseudo-voltage regulator. The voltage regulator includes circuitry to rapidly generate an operating voltage for the core or nucleus logic elements. Additional circuitry is provided to reduce the steady-state power consumption once the operating voltage is reached. To compensate for die-to-die variations, additional circuitry is also provided to adjust the compensation delays or switching rates.