Patents by Inventor Gary L. Coldiron, Sr.

Gary L. Coldiron, Sr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10613854
    Abstract: Systems and methods for automated renumbering, reformatting, and re-referencing of branching statements or go-to instruction line referencing within modified code using a dual-pass approach that includes operations using predicted new line numbers, error detection/correction, and alignment correction processing.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: April 7, 2020
    Assignee: The United States of America, as Represented by the Secretary of the Navy
    Inventor: Gary L. Coldiron, Sr.
  • Publication number: 20190196810
    Abstract: Systems and methods for automated renumbering, reformatting, and re-referencing of branching statements or go-to instruction line referencing within modified code using a dual-pass approach that includes operations using predicted new line numbers, error detection/correction, and alignment correction processing.
    Type: Application
    Filed: December 22, 2017
    Publication date: June 27, 2019
    Applicant: The United States of America as represented by the Secretary of the Navy
    Inventor: Gary L. Coldiron, SR.
  • Patent number: 6961887
    Abstract: A technique of generation of a job for a digital testing unit for a test station from a circuit simulation unit includes completing fault simulation on electronic circuitry, then executing a first program without a fault dictionary, generating a pin map of the electronic circuitry and appending any pin groups, generating test vectors using the pin groups by the first program, generating additional pin groups to accommodate any orphan pins, converting the pin maps and pattern files to pin maps and pattern files, executing the first program to generate the fault dictionary, inputting a minimum scope level of analysis of the circuitry, generating the fault dictionary in fault dictionary data files according to the minimum scope level, generating a fault retriever file from the first program; and transporting the fault dictionary data files, test vectors, new pin maps, and fault retriever file to a second program for run-time fault analysis on the electronic circuitry testing unit.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: November 1, 2005
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Gary L. Coldiron, Sr.
  • Patent number: 6825801
    Abstract: The present application discloses a global positioning satellite emulator which produces an L-1 test signal of a particular user selected global positioning satellite for testing the capacity of a GPS receiver to lock on to the signal of the selected satellite and to properly receive, decode and process the signal. The device of the present invention is relatively inexpensive to manufacture, compact and easily connected to facilitate convenient use. The application also discloses the process by which the capacity of a GPS receiver to lock on to the signal of a particular satellite and properly receive, decode and process the signal may be tested.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: November 30, 2004
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Gary L. Coldiron, Sr., John W. Dove