Abstract: Methods and apparatus for calibration of a second-order input intercept point (IIP2) of a mixer, such as a mixer in a wireless receive chain. One example circuit for mixer IIP2 calibration generally includes a first receive chain comprising a first mixer and a single tone generator having an output coupled to an input of the first mixer and configured to generate a calibration signal having a single baseband tone. One example method of mixer IIP2 calibration generally includes generating a calibration signal comprising a single baseband tone, applying the calibration signal to an input of a mixer, such that the mixer generates a differential tone at an output of the mixer, and adjusting the mixer to minimize a power of the differential tone at the output of the mixer.

Abstract: Aspects of the disclosure relate to a radio frequency phase shifter. An example includes an amplification stage to produce an amplified voltage, the amplification stage having a first amplifier with a first input coupled to a first output of a hybrid coupler and a second amplifier with a complementary second input coupled to a complementary second output of the hybrid coupler. A vector modulation stage coupled to the amplification stage receives the amplified voltage and produces a modulated vector, the vector modulation stage has an in-phase section and a quadrature section to control the phase of the modulated vector in response to a phase control signal. A varactor coupled across the first input and the second input of the amplification stage adjusts the capacitance between the first input and the second input in response to a capacitance control signal.

Abstract: A radio frequency (RF) front-end receiver having a passive mixer with feed-forward intermodulation distortion cancellation, or at least reduction. An example receiver generally includes a mixer having differential input terminals and differential output terminals and a baseband filter having inputs coupled to the differential output terminals of the mixer. The receiver also includes common-mode sensing circuitry coupled to the differential input terminals of the mixer and configured to sense a common-mode signal of a first differential signal present at the differential input terminals of the mixer. The receiver further includes a conversion circuit coupled to the common-mode sensing circuitry and configured to convert the common-mode signal to a second differential signal presented to the differential output terminals of the mixer and the inputs of the baseband filter.

Abstract: Certain aspects of the present disclosure are generally directed to a tunable active filter and a method of calibrating a tunable active filter. One example apparatus is a filter circuit that generally includes a resistor-capacitor (RC) topology tunable active filter comprising a first amplifier, a second amplifier, and a feedback path coupled between an input of the first amplifier and an output of the second amplifier. The filter circuit also includes a negative transconductance circuit coupled to a first node of the tunable active filter.

Abstract: Methods and apparatuses for tuning source impedance for at least a portion of a receive path in a radio frequency front-end. An exemplary circuit generally includes a first tunable resonant circuit having an output coupled to an input of the at least the portion of the receive path and a second tunable resonant circuit having an input coupled to the output of the first tunable resonant circuit and to the input of the at least the portion of the receive path. The circuit also includes a first control input coupled to the first tunable resonant circuit and configured to adjust an impedance of the first tunable resonant circuit based on a frequency response of an output of the at least the portion of the receive path, and a second control input coupled to the second tunable resonant circuit and configured to adjust an admittance of the second tunable resonant circuit.

Abstract: Methods and apparatuses for tuning source impedance for at least a portion of a receive path in a radio frequency front-end. An exemplary circuit generally includes a first tunable resonant circuit having an output coupled to an input of the at least the portion of the receive path and a second tunable resonant circuit having an input coupled to the output of the first tunable resonant circuit and to the input of the at least the portion of the receive path. The circuit also includes a first control input coupled to the first tunable resonant circuit and configured to adjust an impedance of the first tunable resonant circuit based on a frequency response of an output of the at least the portion of the receive path, and a second control input coupled to the second tunable resonant circuit and configured to adjust an admittance of the second tunable resonant circuit.

Abstract: Certain aspects of the present disclosure are generally directed to a tunable active filter and a method of calibrating a tunable active filter. One example apparatus is a filter circuit that generally includes a resistor-capacitor (RC) topology tunable active filter comprising a first amplifier, a second amplifier, and a feedback path coupled between an input of the first amplifier and an output of the second amplifier. The filter circuit also includes a negative transconductance circuit coupled to a first node of the tunable active filter.

Abstract: Certain aspects of the present disclosure provide techniques and circuits for frequency mixing signals. One example circuit generally includes a transformer comprising a primary winding and a secondary winding, the transformer configured to generate a signal across the secondary winding based on a signal at an input node coupled to the primary winding, and a first mixer coupled to the secondary winding of the transformer and configured to convert a frequency of the signal across the secondary winding. In certain aspects, the circuit also includes a biasing circuit having an output coupled to a tap of the secondary winding and configured to generate a biasing voltage by applying an offset voltage to a common-mode voltage of the first mixer and apply the biasing voltage to the tap of the secondary winding to bias the first mixer.

Abstract: A device includes a common gate buffer circuit configured to receive a communication signal, an interfering signal detector configured to provide a control signal indicative of the power level of an interfering signal present with the communication signal and a control circuit configured to control an amount of current flowing through the common gate buffer circuit based on the control signal.

Abstract: During an ESD event, an ESD current flows from a ground node of a first ESD protection circuit and out of an integrated circuit to a terminal of a package that houses the integrated circuit. To improve ESD performance, a second ESD protection circuit is provided. A diode of the second ESD protection circuit is coupled between the ground node and the body of an input transistor of a Low Noise Amplifier (LNA). If the voltage on the ground node changes quickly during an ESD event (for example, due to a current spike flowing across a wire bond), then the diode charges the body of the transistor, thereby preventing a large gate-to-body voltage from developing across transistor. In some embodiments, another ground bond pad is provided and the second ESD protection circuit includes other diodes that charge or discharge other nodes during the ESD event to prevent transistor damage.

Abstract: During an ESD event, an ESD current flows from a ground node of a first ESD protection circuit and out of an integrated circuit to a terminal of a package that houses the integrated circuit. To improve ESD performance, a second ESD protection circuit is provided. A diode of the second ESD protection circuit is coupled between the ground node and the body of an input transistor of a Low Noise Amplifier (LNA). If the voltage on the ground node changes quickly during an ESD event (for example, due to a current spike flowing across a wire bond), then the diode charges the body of the transistor, thereby preventing a large gate-to-body voltage from developing across transistor. In some embodiments, another ground bond pad is provided and the second ESD protection circuit includes other diodes that charge or discharge other nodes during the ESD event to prevent transistor damage.