Abstract: A video processor system has separate and independent video processors for performing a variety of video processor functions required for encoding and decoding video signals. Each of the separate video processors performs its own individual set of video processor functions. During the encode process the first video processor performs motion estimation to provide motion estimation information which it applies to the second video processor. The second video processor receives the motion estimation information and performs forward and inverse discrete cosine transforms, quantization and dequantization, frame addition and frame differencing, as well as run length encoding. The run length encoding operation produces run/value pairs which are then applied to the first video processor. The first video processor performs variable length encoding upon the run/value pairs.

Abstract: A video processor system has memory locations for storing images including a buffer block of memory locations. Two separate video processors within the system read and write the buffer block while performing video processor functions. Each of the two video processors has its own read pointer and its own write pointer for indicating locations within the buffer block where it is currently reading or writing an image which it is processing. Both sets of read and write pointers advance through the buffer block as the images are processed. When the pointers reach the end of the buffer block they wrap around to the beginning thereby defining circular buffers. The operations of the two video processors, as well as the reading, advancing, and adjusting of the pointers, is adapted to cause the circular buffers to occupy the same physical memory locations simultaneously.