Patents by Inventor Gary Peter Moscaluk
Gary Peter Moscaluk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230197128Abstract: Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides bias currents to drivers of the non-volatile memory system in a standby mode.Type: ApplicationFiled: February 13, 2023Publication date: June 22, 2023Inventors: Cristinel Zonte, Vijay Raghavan, Iulian C Gradinariu, Gary Peter Moscaluk, Roger Bettman, Vineet Argrawal, Samuel Leshner
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Patent number: 11581029Abstract: Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides bias currents to drivers of the non-volatile memory system in a standby mode.Type: GrantFiled: April 30, 2021Date of Patent: February 14, 2023Assignee: LONGITUDE ELASH MEMORY SOLUTIONS LTDInventors: Cristinel Zonte, Vijay Raghavan, Iulian C Gradinariu, Gary Peter Moscaluk, Roger Bettman, Vineet Argrawal, Samuel Leshner
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Publication number: 20210327477Abstract: Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides bias currents to drivers of the non-volatile memory system in a standby mode.Type: ApplicationFiled: April 30, 2021Publication date: October 21, 2021Inventors: Cristinel Zonte, Vijay Raghavan, Iulian C. Gradinariu, Gary Peter Moscaluk, Roger Bettman, Vineet Argrawal, Samuel Leshner
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Patent number: 10998019Abstract: Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides bias currents to drivers of the non-volatile memory system in a standby mode.Type: GrantFiled: December 16, 2019Date of Patent: May 4, 2021Assignee: Longitude Flash Memory Solutions, Ltd.Inventors: Cristinel Zonte, Vijay Raghavan, Iulian C. Gradinariu, Gary Peter Moscaluk, Roger Bettman, Vineet Argrawal, Samuel Leshner
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Publication number: 20200234746Abstract: Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides bias currents to drivers of the non-volatile memory system in a standby mode.Type: ApplicationFiled: December 16, 2019Publication date: July 23, 2020Inventors: Cristinel Zonte, Vijay Raghavan, Iulian C. Gradinariu, Gary Peter Moscaluk, Roger Bettman, Vineet Argrawal, Samuel Leshner
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Patent number: 10510387Abstract: A method for driving a non-volatile memory system is disclosed. A standby detection circuit detects whether the nonvolatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit reduces bias currents provided to drivers of the non-volatile memory system in a standby mode. The non-volatile memory system is operated in the standby mode after the bias currents have been reduced, where an output signal indicating the standby mode is maintained until a read instruction is detected.Type: GrantFiled: August 6, 2018Date of Patent: December 17, 2019Assignee: LONGITUDE FLASH MEMORY SOLUTIONS LTD.Inventors: Cristinel Zonte, Vijay Raghavan, Iulian Gradinariu, Gary Peter Moscaluk, Roger Jay Bettman, Vineet Argrawal, Samuel Leshner
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Publication number: 20190080732Abstract: A method for driving a non-volatile memory system is disclosed. A standby detection circuit detects whether the nonvolatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit reduces bias currents provided to drivers of the non-volatile memory system in a standby mode. The non-volatile memory system is operated in the standby mode after the bias currents have been reduced, where an output signal indicating the standby mode is maintained until a read instruction is detected.Type: ApplicationFiled: August 6, 2018Publication date: March 14, 2019Applicant: Cypress Semiconductor CorporationInventors: Cristinel Zonte, Vijay Raghavan, Iulian Gradinariu, Gary Peter Moscaluk, Roger Jay Bettman, Vineet Argrawal, Samuel Leshner
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Patent number: 10062423Abstract: Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides bias currents to drivers of the non-volatile memory system in a standby mode.Type: GrantFiled: September 16, 2016Date of Patent: August 28, 2018Assignee: Cypress Semiconductor CorporationInventors: Cristinel Zonte, Vijay Raghavan, Iulian C. Gradinariu, Gary Peter Moscaluk, Roger Bettman, Vineet Argrawal, Samuel Leshner
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Publication number: 20170098468Abstract: Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides bias currents to drivers of the non-volatile memory system in a standby mode.Type: ApplicationFiled: September 16, 2016Publication date: April 6, 2017Inventors: Cristinel Zonte, Vijay Raghavan, Iulian C. Gradinariu, Gary Peter Moscaluk, Roger Bettman, Vineet Argrawal, Samuel Leshner
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Patent number: 9608615Abstract: A biasing circuit includes cascoded transistors including a first transistor and a second transistor. A first gate of the first transistor is coupled to a second gate of the second transistor at a first node. The circuit also includes a voltage control circuit coupled to at least one of the first transistor or the second transistor. The voltage control circuit is configured to change a voltage level of at least one of the first transistor or the second transistor to allow voltage domain transition of an output signal in view of a change in state of an input signal without ramping a supply signal of the biasing circuit.Type: GrantFiled: December 10, 2015Date of Patent: March 28, 2017Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Gary Peter Moscaluk, Bogdan I. Georgescu, Timothy Williams
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Publication number: 20160365849Abstract: A biasing circuit includes cascoded transistors including a first transistor and a second transistor. A first gate of the first transistor is coupled to a second gate of the second transistor at a first node. The circuit also includes a voltage control circuit coupled to at least one of the first transistor or the second transistor. The voltage control circuit is configured to change a voltage level of at least one of the first transistor or the second transistor to allow voltage domain transition of an output signal in view of a change in state of an input signal without ramping a supply signal of the biasing circuit.Type: ApplicationFiled: December 10, 2015Publication date: December 15, 2016Inventors: Gary Peter Moscaluk, Bogdan I. Georgescu, Timothy Williams
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Patent number: 9449655Abstract: Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides bias currents to drivers of the non-volatile memory system in a standby mode.Type: GrantFiled: December 11, 2015Date of Patent: September 20, 2016Assignee: Cypress Semiconductor CorporationInventors: Cristinel Zonte, Vijay Raghavan, Iulian C. Gradinariu, Gary Peter Moscaluk, Roger Bettman, Vineet Argrawal, Samuel Leshner
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Patent number: 9129686Abstract: Apparatus, systems, and methods for providing high voltage to memory devices are provided. One apparatus includes a low voltage input and a two-rail level shifting. The two-rail level shifting is configured to increase the low voltage or to decrease the low voltage to an amount that is less than or equal to a ground potential based on the amount of the low voltage. A system includes a low voltage input for receiving a voltage and a two-rail level shifting coupled to the low voltage input. The two-rail level shifting is configured to increase the voltage to a positive voltage if the voltage is equal to a ground potential and decrease the voltage to a negative voltage if the voltage is greater than the ground potential. One method includes receiving a voltage, modifying the voltage to generate one of a plurality of output voltages, and providing the output voltage to a memory device.Type: GrantFiled: May 23, 2014Date of Patent: September 8, 2015Assignee: Cypress Semiconductor CorporationInventors: Ryan T Hirose, Bogdan I. Georgescu, Leonard Vasile Gitlan, Ashish Ashok Amonkar, Gary Peter Moscaluk, John W. Tiede
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Publication number: 20140369136Abstract: Apparatus, systems, and methods for providing high voltage to memory devices are provided. One apparatus includes a low voltage input and a two-rail level shifting. The two-rail level shifting is configured to increase the low voltage or to decrease the low voltage to an amount that is less than or equal to a ground potential based on the amount of the low voltage. A system includes a low voltage input for receiving a voltage and a two-rail level shifting coupled to the low voltage input. The two-rail level shifting is configured to increase the voltage to a positive voltage if the voltage is equal to a ground potential and decrease the voltage to a negative voltage if the voltage is greater than the ground potential. One method includes receiving a voltage, modifying the voltage to generate one of a plurality of output voltages, and providing the output voltage to a memory device.Type: ApplicationFiled: May 23, 2014Publication date: December 18, 2014Applicant: Cypress Semiconductor CorporationInventors: Ryan T. Hirose, Bogdan I. Georgescu, Leonard Vasile Gitlan, Ashish Ashok Amonkar, Gary Peter Moscaluk, John W. Tiede
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Patent number: 7279981Abstract: A unity gain amplifier has a current mirror. A compensation circuit has an input coupled to an output of the current mirror. An output transistor has a base coupled to the output of the current mirror and a source of the output transistor is coupled to an output of the compensation circuit. The compensation circuit has a resistor in series with a capacitor.Type: GrantFiled: August 24, 2004Date of Patent: October 9, 2007Assignee: Cypress Semiconductor Corp.Inventor: Gary Peter Moscaluk
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Patent number: 7173475Abstract: A signal transmission amplifier circuit has a transmission gate with an input coupled to an input signal. A cross coupled latch is coupled to an output of the transmission gate and has a signal output. A reference generating circuit is coupled to the cross coupled latch.Type: GrantFiled: March 10, 2004Date of Patent: February 6, 2007Assignee: Cypress Semiconductor Corp.Inventors: Gary Peter Moscaluk, John Eric Gross
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Patent number: 7158429Abstract: A system for read path acceleration has a first strobe reset circuit coupled to a first local amplifier. A second strobe reset circuit is coupled to a second local amplifier. A main amplifier is coupled to an output of the first local amplifier and an output of the second local amplifier.Type: GrantFiled: March 16, 2004Date of Patent: January 2, 2007Assignee: Cypress Semiconductor Corp.Inventors: Gary Peter Moscaluk, John Eric Gross
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Patent number: 5854568Abstract: A voltage boost circuit allows a reference input voltage to be boosted in a manner that is less sensitive to variations in power supply voltage levels, temperature, and semiconductor process used. A nominal boost voltage of approximately 1.5 volts is supplied, even at very low power supply voltages. A boost voltage less than 1.5 volts is supplied down to power supply voltages of approximately 1.8 volts.Type: GrantFiled: August 20, 1997Date of Patent: December 29, 1998Assignee: Ramtron International CorporationInventor: Gary Peter Moscaluk