Patents by Inventor Gary R. Flauaus

Gary R. Flauaus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interconnection architecture for managing multiple low bandwidth connections over a high bandwidth link
    Patent number: 6975623
    Abstract: A data communication architecture including a plurality of devices having input/output (I/O) ports supporting communication at a first rate and a data processor having a number of I/O ports where each I/O port supports data communication at a second data rate. The second data rate is at least double the first data rate. A communication link coupled to one of the data processor I/O ports supports the second data rate. A bridge device is coupled to the communication link and to the I/O ports of the plurality of devices. The bridge device translates the communication link at the second data rate to a plurality of communication links at the first data rate, where the plurality of communication links at the first data rate are substantially independent of each other.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: December 13, 2005
    Assignee: McDATA Corporation
    Inventors: Jeffrey J. Nelson, Gary R. Flauaus, Daniel F. Casper, Joseph C. Elliott, Catherine C. Huang, John R. Flanagan, Louis W. Ricci
  • Interconnection architecture for managing multiple low bandwidth connections over a high bandwidth link
    Publication number: 20040174867
    Abstract: A data communication architecture including a plurality of devices having input/output (I/O) ports supporting communication at a first rate and a data processor having a number of I/O ports where each I/O port supports data communication at a second data rate. The second data rate is at least double the first data rate. A communication link coupled to one of the data processor I/O ports supports the second data rate. A bridge device is coupled to the communication link and to the I/O ports of the plurality of devices. The bridge device translates the communication link at the second data rate to a plurality of communication links at the first data rate, where the plurality of communication links at the first data rate are substantially independent of each other.
    Type: Application
    Filed: March 10, 2004
    Publication date: September 9, 2004
    Inventors: Jeffrey J. Nelson, Gary R. Flauaus, Daniel F. Casper, Joseph C. Elliott, Catherine C. Huang, John R. Flanagan, Louis W. Ricci
  • Interconnection architecture for managing multiple low bandwidth connections over a high bandwidth link
    Patent number: 6728803
    Abstract: A data communication architecture including a plurality of devices having input/output (I/O) ports supporting communication at a first rate and a data processor having a number of I/O ports where each I/O port supports data communication at a second data rate. The second data rate is at least double the first data rate. A communication link coupled to one of the data processor I/O ports supports the second data rate. A bridge device is coupled to the communication link and to the I/O ports of the plurality of devices. The bridge device translates the communication link at the second data rate to a plurality of communication links at the first data rate, where the plurality of communication links at the first data rate are substantially independent of each other.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: April 27, 2004
    Assignee: McData Corporation
    Inventors: Jeffrey J. Nelson, Gary R. Flauaus, Daniel F. Casper, Joseph C. Elliott, Catherine C. Huang, John R. Flanagan, Louis W. Ricci