Patents by Inventor Gary Ramsay

Gary Ramsay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7281001
    Abstract: A system (1) generates an output indicating scores for the extent of matching of pairs of data records. Thresholds may be set for the scores for decision-making or human review. A vector extraction module (12) measures similarity of pairs of fields in a pair of records to generate a vector. The vector is then processed to generate a score for the record pair.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: October 9, 2007
    Assignee: Informatica Corporation
    Inventors: Brian Caulfield, Garry Moroney, Padraig Cunningham, Ronan Pearce, Gary Ramsay, Sarah-Jane Delany
  • Publication number: 20040158562
    Abstract: A system (1) generates an output indicating scores for the extent of matching of pairs of data records. Thresholds may be set for the scores for decision-making or human review. A vector extraction module (12) measures similarity of pairs of fields in a pair of records to generate a vector. The vector is then processed to generate a score for the record pair.
    Type: Application
    Filed: February 2, 2004
    Publication date: August 12, 2004
    Inventors: Brian Caulfield, Garry Moroney, Padraig Cunningham, Ronan Pearce, Gary Ramsay, Sarah-Jane Delany
  • Patent number: 5537051
    Abstract: A method and apparatus for testing integrated circuits by connecting a plurality of leads (25) of a device (10) to a test board (50). The test fixture (32) includes a test plate (70) having a plurality of test points (74) corresponding to the leads (25) of the device (10) and an alignment plate (60). The test points (74) are electrically connected to the test board (50) by a series of runners (76) extending from the test points (74) on the test plate (70) to a series of bumped finger pads (72) on the test plate (70). The bumped finger pads (72) of the test plate (70) are electrically connected to a series of bumped finger pads (54) on an active side (52) of the test board (50). The test plate (70) is fabricated of flex material. The alignment plate (60) is fabricated of flex material and is mounted on top of the test plate (70), so that the alignment plate (60) covers the runners (76), electrically insulating the runners (76).
    Type: Grant
    Filed: April 24, 1995
    Date of Patent: July 16, 1996
    Assignee: Motorola, Inc.
    Inventors: Suhail M. Jalloul, Jeffrey S. Whisenhunt, Gary A. Ramsay